[gcc r16-9460] vectorizer: Don't enlarge base alignment during costing

https://gcc.gnu.org/g:f1c1322dca42d88edef68762ab52a4c6aacd218a

commit r16-9460-gf1c1322dca42d88edef68762ab52a4c6aacd218a
Author: H.J. Lu <[email protected]>
Date:   Sun Jul 26 19:21:55 2026 +0800

    vectorizer: Don't enlarge base alignment during costing
    
    We errorneously commit the recorded base alignment during costing
    since the costing refactoring.  This causes alignment to be
    computed based on a possibly larger vector type than used in the
    end.
    
    gcc/
    
            PR middle-end/126410
            * tree-vect-stmts.cc (vectorizable_store): Only commit to
            recorded base alignment when transforming.
            (vectorizable_load): Likewise.
    
    gcc/testsuite/
    
            PR middle-end/126410
            * gcc.target/i386/pr126410-1a.c: New test.
            * gcc.target/i386/pr126410-1b.c: Likewise.
            * gcc.target/i386/pr126410-1c.c: Likewise.
            * gcc.target/i386/pr126410-2a.c: Likewise.
            * gcc.target/i386/pr126410-2b.c: Likewise.
            * gcc.target/i386/pr126410-2c.c: Likewise.
    
    Co-Authored-By: Richard Biener  <[email protected]>
    Signed-off-by: H.J. Lu <[email protected]>
    (cherry picked from commit 7c7c6626410c261d188a96d9b2a15d3781d0dcfb)

Diff:
---
 gcc/testsuite/gcc.target/i386/pr126410-1a.c | 22 ++++++++++++++++++++++
 gcc/testsuite/gcc.target/i386/pr126410-1b.c |  8 ++++++++
 gcc/testsuite/gcc.target/i386/pr126410-1c.c |  7 +++++++
 gcc/testsuite/gcc.target/i386/pr126410-2a.c | 22 ++++++++++++++++++++++
 gcc/testsuite/gcc.target/i386/pr126410-2b.c |  8 ++++++++
 gcc/testsuite/gcc.target/i386/pr126410-2c.c |  7 +++++++
 gcc/tree-vect-stmts.cc                      |  6 ++++--
 7 files changed, 78 insertions(+), 2 deletions(-)

diff --git a/gcc/testsuite/gcc.target/i386/pr126410-1a.c b/gcc/testsuite/gcc.target/i386/pr126410-1a.c
new file mode 100644
index 000000000000..489064cda6b2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr126410-1a.c
@@ -0,0 +1,22 @@
+/* { dg-do compile { target *-*-linux* } } */
+/* { dg-options "-O2 -march=x86-64-v4 -fomit-frame-pointer" } */
+/* { dg-final { scan-assembler-not "and\[lq\]?\[\\t \]*\\$-64,\[\\t \]*%\[re\]?sp" } } */
+
+#ifndef N
+#define N 4
+#endif
+
+typedef float vector[N];
+
+extern vector v;
+
+extern void foo (vector *);
+
+void
+func (vector a, vector b)
+{
+  vector r;
+  for (int i = 0; i < N; i++)
+    r[i] = a[i] * b[i];
+  foo (&r);
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr126410-1b.c b/gcc/testsuite/gcc.target/i386/pr126410-1b.c
new file mode 100644
index 000000000000..7e7141eb2e08
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr126410-1b.c
@@ -0,0 +1,8 @@
+/* { dg-do compile { target *-*-linux* } } */
+/* { dg-options "-O2 -march=x86-64-v4 -fomit-frame-pointer" } */
+/* { dg-final { scan-assembler "and\[lq\]?\[\\t \]*\\$-32,\[\\t \]*%\[re\]?sp" } } */
+/* { dg-final { scan-assembler-not "and\[lq\]?\[\\t \]*\\$-64,\[\\t \]*%\[re\]?sp" } } */
+
+#define N 8
+
+#include "pr126410-1a.c"
diff --git a/gcc/testsuite/gcc.target/i386/pr126410-1c.c b/gcc/testsuite/gcc.target/i386/pr126410-1c.c
new file mode 100644
index 000000000000..8b5fb5bc1503
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr126410-1c.c
@@ -0,0 +1,7 @@
+/* { dg-do compile { target *-*-linux* } } */
+/* { dg-options "-O2 -march=x86-64-v4 -fomit-frame-pointer" } */
+/* { dg-final { scan-assembler "and\[lq\]?\[\\t \]*\\$-64,\[\\t \]*%\[re\]?sp" } } */
+
+#define N 16
+
+#include "pr126410-1a.c"
diff --git a/gcc/testsuite/gcc.target/i386/pr126410-2a.c b/gcc/testsuite/gcc.target/i386/pr126410-2a.c
new file mode 100644
index 000000000000..8bd455731456
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr126410-2a.c
@@ -0,0 +1,22 @@
+/* { dg-do compile { target *-*-linux* } } */
+/* { dg-options "-O2 -march=x86-64-v4 -fomit-frame-pointer" } */
+/* { dg-final { scan-assembler-not "and\[lq\]?\[\\t \]*\\$-64,\[\\t \]*%\[re\]?sp" } } */
+
+#ifndef N
+#define N 4
+#endif
+
+typedef struct { float values[N]; } vector;
+
+extern vector v;
+
+extern void foo (vector *);
+
+void
+func (vector a, vector b)
+{
+  vector r;
+  for (int i = 0; i < N; i++)
+    r.values[i] = a.values[i] * b.values[i];
+  foo (&r);
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr126410-2b.c b/gcc/testsuite/gcc.target/i386/pr126410-2b.c
new file mode 100644
index 000000000000..30743cd73f1b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr126410-2b.c
@@ -0,0 +1,8 @@
+/* { dg-do compile { target *-*-linux* } } */
+/* { dg-options "-O2 -march=x86-64-v4 -fomit-frame-pointer" } */
+/* { dg-final { scan-assembler "and\[lq\]?\[\\t \]*\\$-32,\[\\t \]*%\[re\]?sp" } } */
+/* { dg-final { scan-assembler-not "and\[lq\]?\[\\t \]*\\$-64,\[\\t \]*%\[re\]?sp" } } */
+
+#define N 8
+
+#include "pr126410-2a.c"
diff --git a/gcc/testsuite/gcc.target/i386/pr126410-2c.c b/gcc/testsuite/gcc.target/i386/pr126410-2c.c
new file mode 100644
index 000000000000..d618b36e15b4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr126410-2c.c
@@ -0,0 +1,7 @@
+/* { dg-do compile { target *-*-linux* } } */
+/* { dg-options "-O2 -march=x86-64-v4 -fomit-frame-pointer" } */
+/* { dg-final { scan-assembler "and\[lq\]?\[\\t \]*\\$-64,\[\\t \]*%\[re\]?sp" } } */
+
+#define N 16
+
+#include "pr126410-2a.c"
diff --git a/gcc/tree-vect-stmts.cc b/gcc/tree-vect-stmts.cc
index f91e7ad1e498..5a15952ea11d 100644
--- a/gcc/tree-vect-stmts.cc
+++ b/gcc/tree-vect-stmts.cc
@@ -8337,7 +8337,8 @@ vectorizable_store (vec_info *vinfo,
 
   /* Transform.  */
 
-  ensure_base_align (dr_info);
+  if (!costing_p)
+    ensure_base_align (dr_info);
 
   if (STMT_VINFO_SIMD_LANE_ACCESS_P (stmt_info) >= 3)
     {
@@ -9977,7 +9978,8 @@ vectorizable_load (vec_info *vinfo,
   /* Transform.  */
 
   dr_vec_info *dr_info = STMT_VINFO_DR_INFO (stmt_info), *first_dr_info = NULL;
-  ensure_base_align (dr_info);
+  if (!costing_p)
+    ensure_base_align (dr_info);
 
   if (memory_access_type == VMAT_INVARIANT)
     {