[gcc r17-3318] AVR: Fix typos in comments.

https://gcc.gnu.org/g:8df013222dffbd5762233e5cfe739951e481df06

commit r17-3318-g8df013222dffbd5762233e5cfe739951e481df06
Author: Georg-Johann Lay <[email protected]>
Date:   Sun Aug 16 16:23:49 2026 +0200

    AVR: Fix typos in comments.
    
    gcc/
            * config/avr/avr.cc: Fix typos in comments.
            * config/avr/avr.md: Same.
            * config/avr/avr-passes.cc: Same.
            * config/avr/genmultilib.awk: Same.
    libgcc/
            * config/avr/lib1funcs.S: Fix typo in comment.

Diff:
---
 gcc/config/avr/avr-passes.cc   | 6 +++---
 gcc/config/avr/avr.cc          | 6 +++---
 gcc/config/avr/avr.md          | 2 +-
 gcc/config/avr/genmultilib.awk | 2 +-
 libgcc/config/avr/lib1funcs.S  | 2 +-
 5 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/gcc/config/avr/avr-passes.cc b/gcc/config/avr/avr-passes.cc
index f2ba0967f15f..7dc6f2b77c18 100644
--- a/gcc/config/avr/avr-passes.cc
+++ b/gcc/config/avr/avr-passes.cc
@@ -1456,7 +1456,7 @@ plies_t::emit_blds (const insninfo_t &ii, int &n_insns, int istart) const
 
 // Emit insns for a contiguous sequence of SET ply_t's starting at
 // .plies[ISTART].  Advances N_INSNS by the number of emitted insns.
-// MEMO ist the state of the GPRs before II is executed, where II
+// MEMO is the state of the GPRs before II is executed, where II
 // represents the insn under optimization.
 // The emitted insns are "movqi_insn" or "*reload_inqi"
 // when .plies[ISTART].in_set_some is not set, and one "set_some" insn
@@ -2172,7 +2172,7 @@ memento_t::apply_insn1 (rtx_insn *insn, bool unused)
   // Get an abstract representation of src.  Bytes may be unknown,
   // known to equal some 8-bit compile-time constant (CTC) value,
   // or are known to equal some 8-bit register.
-  // TODO: Currently, only the ai[].val8 knowledge ist used.
+  // TODO: Currently, only the ai[].val8 knowledge is used.
   //       What's the best way to make use of ai[].regno ?
 
   absint_t ai = absint_t::explore (src, mold, mode);
@@ -5773,7 +5773,7 @@ avr_byte_maybe_mem (rtx x, int n)
 
 /* Split multi-byte load / stores into 1-byte such insns
    provided non-volatile, addr-space = generic, no reg-overlap
-   and the resulting addressings are all natively supported.
+   and the resulting addressing modes are all natively supported.
    Returns true when the  XOP[0] = XOP[1]  insn has been split and
    false, otherwise.  */
 
diff --git a/gcc/config/avr/avr.cc b/gcc/config/avr/avr.cc
index 87c4044f076a..a873a1262843 100644
--- a/gcc/config/avr/avr.cc
+++ b/gcc/config/avr/avr.cc
@@ -6162,7 +6162,7 @@ avr_out_set_some (rtx_insn *insn, rtx *xop, int *plen)
   scratch = REG_P (xop[1]) ? xop[1] : NULL_RTX;
   oldval = NULL_RTX;
 
-  /* There are 3 ways to get a scratch, starting withe the most preferred ones:
+  /* There are 3 ways to get a scratch, starting with the most preferred ones:
      1) avr_find_unused_d_reg() need not to be restored, and it takes care
 	of fixed regs.  This is an unlikely case, e.g. with -fno-peephole2.
      2) "set_some" provides a scratch register with a known content.
@@ -9840,7 +9840,7 @@ avr_out_bitop (rtx xinsn, rtx *xop, int *plen)
   /* Number of bytes to operate on.  */
   int n_bytes = GET_MODE_SIZE (mode);
 
-  /* Value of T-flag (0 or 1) or -1 if unknow.  */
+  /* Value of T-flag (0 or 1) or -1 if unknown.  */
   int set_t = -1;
 
   /* Value (0..0xff) held in clobber register op[3] or -1 if unknown.  */
@@ -15900,7 +15900,7 @@ avr_expand_delay_cycles (rtx operands0)
   //
   // where loop_count denotes the start value of the N-byte loop counter.
   // The maximum value that can be loaded into loop_count is  2^{8 * N},
-  // where the maxmium value is realized by loop_count = 0.
+  // where the maximum value is realized by loop_count = 0.
   // Up to  N + 2 - 1  cycles can be added by trailing NOPs without
   // impeding the loop_count calculation, so that we arrive at a
   // condition of
diff --git a/gcc/config/avr/avr.md b/gcc/config/avr/avr.md
index 7fa07622c91d..eb344ea4e70f 100644
--- a/gcc/config/avr/avr.md
+++ b/gcc/config/avr/avr.md
@@ -1060,7 +1060,7 @@
 
     // Splitting multi-byte load / stores into 1-byte such insns
     // provided non-volatile, addr-space = generic, no reg-overlap
-    // and the resulting addressings are natively supported.
+    // and the resulting addressing modes are natively supported.
     if (avropt_split_ldst
         // Splitting too early may obfuscate some PRE_DEC / POST_INC
         // opportunities, thus only split after avr-fuse-add.
diff --git a/gcc/config/avr/genmultilib.awk b/gcc/config/avr/genmultilib.awk
index dcddbfcef2d9..cc59e6ea5cff 100644
--- a/gcc/config/avr/genmultilib.awk
+++ b/gcc/config/avr/genmultilib.awk
@@ -132,7 +132,7 @@ BEGIN {
 ##################################################################
 # Run over all AVR_MCU Lines.  If we encounter a required multilib
 # variant, add according combination of options to m_required,
-# but onyl once.  Add encountered cores to m_dirnames and
+# but only once.  Add encountered cores to m_dirnames and
 # according -mmcu= options to m_options.
 ##################################################################
 
diff --git a/libgcc/config/avr/lib1funcs.S b/libgcc/config/avr/lib1funcs.S
index f780a6965dc4..1a7ed9483cf0 100644
--- a/libgcc/config/avr/lib1funcs.S
+++ b/libgcc/config/avr/lib1funcs.S
@@ -1689,7 +1689,7 @@ DEFUN __udivmod64
     ;; Thus, we can return immediately
     rjmp    5f
 
-2:  ;; Initialze Bit-Counter with Number of Bits still to be performed
+2:  ;; Initialize Bit-Counter with Number of Bits still to be performed
     mov     R_cnt, C7
 
     ;; Push of A7 is not needed because C7 is still 0