[gcc r17-3486] RISC-V: Fix zvl effective-target check cache collision
Ma Jin via Gcc-cvs <[email protected]>
| Newsgroups | gmane.comp.gcc.cvs |
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| Message-ID | <[email protected]> |
https://gcc.gnu.org/g:8335b96b21bf2866773351f906a978b8e0cf25dc commit r17-3486-g8335b96b21bf2866773351f906a978b8e0cf25dc Author: Jin Ma <[email protected]> Date: Thu Aug 20 14:09:59 2026 +0800 RISC-V: Fix zvl effective-target check cache collision The rvv_zvl*_ok checks use the same check_runtime property despite testing different vector lengths. Whichever check runs first supplies the cached result for all of them. Thus a VLEN=128 check can control VLEN=256 tests and vice versa, causing unsupported tests to run or supported tests to be skipped. Give each check a unique property. The existing tests already cover the affected checks and expose this order-dependent intermittent failure, so no new testcase is needed. gcc/testsuite/ChangeLog: * lib/target-supports.exp (check_effective_target_rvv_zvl128b_ok): Use a unique check_runtime property name. (check_effective_target_rvv_zvl256b_ok): Likewise. (check_effective_target_rvv_zvl_ge_256b_ok): Likewise. (check_effective_target_rvv_zvl512b_ok): Likewise. Signed-off-by: Jin Ma <[email protected]> Diff: --- gcc/testsuite/lib/target-supports.exp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 1727887d3f49..13a269100941 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -2177,7 +2177,7 @@ proc check_effective_target_riscv_v { } { proc check_effective_target_rvv_zvl128b_ok { } { # Check if the target has a VLENB of 16. set gcc_march [riscv_get_arch] - return [check_runtime ${gcc_march}_exec { + return [check_runtime ${gcc_march}_zvl128b_exec { int main() { int vlenb = 0; @@ -2195,7 +2195,7 @@ proc check_effective_target_rvv_zvl128b_ok { } { proc check_effective_target_rvv_zvl256b_ok { } { # Check if the target has a VLENB of 32. set gcc_march [riscv_get_arch] - return [check_runtime ${gcc_march}_exec { + return [check_runtime ${gcc_march}_zvl256b_exec { int main() { int vlenb = 0; @@ -2213,7 +2213,7 @@ proc check_effective_target_rvv_zvl256b_ok { } { proc check_effective_target_rvv_zvl_ge_256b_ok { } { # Check if the target has at least a VLENB of 32. set gcc_march [riscv_get_arch] - return [check_runtime ${gcc_march}_exec { + return [check_runtime ${gcc_march}_zvl_ge_256b_exec { int main() { int vlenb = 0; @@ -2231,7 +2231,7 @@ proc check_effective_target_rvv_zvl_ge_256b_ok { } { proc check_effective_target_rvv_zvl512b_ok { } { # Check if the target has a VLENB of 64. set gcc_march [riscv_get_arch] - return [check_runtime ${gcc_march}_exec { + return [check_runtime ${gcc_march}_zvl512b_exec { int main() { int vlenb = 0;