Re: RFC: Allow "(mem:<vectype> (reg:<vectype>))"

On 26/06/2026 16:53, Richard Sandiford wrote:
> Andrew Stubbs <[email protected]> writes:
>>> x86 gets away with
>>>
>>> (define_insn "*<avx512>_load<mode>_mask"
>>>     [(set (match_operand:V48_AVX512VL 0 "register_operand" "=v")
>>>       (vec_merge:V48_AVX512VL
>>>         (unspec:V48_AVX512VL
>>>           [(match_operand:V48_AVX512VL 1 "memory_operand" "m")]
>>>           UNSPEC_MASKLOAD)
>>>         (match_operand:V48_AVX512VL 2 "nonimm_or_0_operand" "0C")
>>>         (match_operand:<avx512fmaskmode> 3 "register_operand" "Yk")))]
>>>
>>> so the (unspec ...) is wrapped around the MEM.
>>
>> I tried that; it just tried to reload the entire unspec. [...]
> 
> Out of curiosity, how did that happen?  In the pattern above, the unspec
> is a fixed part of the pattern, whereas LRA only reloads match_operands.

You're right; my RTL looked like this, but I had the match_operand 
recognize the unspec because I wanted to prevent LRA from separating it 
from the MEM.

With it the way you have it in that example, the unspec is completely 
inactive, as far as LRA is concerned.

Andrew