Re: Specifying different registers in inline asm

Xi Ruoyao via Gcc-help <[email protected]>
Newsgroups gmane.comp.gcc.help
Message-ID <[email protected]>
On Tue, 2025-11-18 at 11:22 +0100, jh--- via Gcc-help wrote:
> Hi,
> 
> I am sorry if the answer is trivial, but I couldn't find it.
> I need to access a specific instruction on ARM, so I used an inline asm 
> block to do it.
> My problem is that the instruction (LDRBT) reads a byte in a register 
> from an address, but the address is written back to its register as 
> well, so the destination and the address register should be different 
> (as helpfully mentioned by the assembler: "destination register same as 
> write-back base"). The code generator produces "LDRBT R3, [R3]" which is 
> not correct.
> I would like to specify that I want two distinct registers for %0 and %1 
> (my code is LDRBT %0, [%1]), but I did not find how.
> Could you please tell me what the situation is here (I could make a 
> work-around by moving the result to another register and using the 
> clobber list, but that's inefficient on several scales)?
> Also, more generally, is this not an issue that could be considered 
> being addressed, maybe by adding to the asm constraints (if it is not 
> yet the case) or by adding it to the documentation (as an example)?

Use the "&" modifier for the output.

‘&’
     Means (in a particular alternative) that this operand is an
     “earlyclobber” operand, which is written before the instruction is
     finished using the input operands.  Therefore, this operand may not
     lie in a register that is read by the instruction or as part of any
     memory address.

-- 
Xi Ruoyao <[email protected]>
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