Re: Specifying different registers in inline asm

Hi!

On Tue, Nov 18, 2025 at 11:22:40AM +0100, jh--- via Gcc-help wrote:
> I am sorry if the answer is trivial, but I couldn't find it.
> I need to access a specific instruction on ARM, so I used an inline asm
> block to do it.
> My problem is that the instruction (LDRBT) reads a byte in a register from
> an address, but the address is written back to its register as well, so the

If an operand is both read and written, you should inform the compiler
of that fact.  Typically by marking it as "+" (i.e. read/write) output
constraint.

> destination and the address register should be different (as helpfully
> mentioned by the assembler: "destination register same as write-back base").
> The code generator produces "LDRBT R3, [R3]" which is not correct.
> I would like to specify that I want two distinct registers for %0 and %1 (my
> code is LDRBT %0, [%1]), but I did not find how.

If you want literally what you ask for (but read above), what you want
is an "earlyclobber".  Written as "&", see the manual.

> Could you please tell me what the situation is here (I could make a
> work-around by moving the result to another register and using the clobber
> list, but that's inefficient on several scales)?
> Also, more generally, is this not an issue that could be considered being
> addressed, maybe by adding to the asm constraints (if it is not yet the
> case) or by adding it to the documentation (as an example)?

It is a pretty common problem, and that is why it has been handled since
decades already :-)


Segher