Re: Using CPU flags in C
Jonathan Wakely via Gcc-help <[email protected]>
| Newsgroups | gmane.comp.gcc.help |
|---|---|
| Message-ID | <CAH6eHdRjT=H33eqm+yqMRYcptvm6MxtL6dZTYyf5eUfy3Kik5A@mail.gmail.com> |
I don't think the OP is subscribed, so if you don't use Reply-All they might not see your replies. On Wed, 19 Nov 2025 at 10:31, Matthias Pfaller <[email protected]> wrote: > > How about googling for "=@ccz" __asm__? One of the top hits is a six year old > stackoverflow thread. Its funny, Florian participated in that thread if I'm not > mistaken... > > regards, Matthias > > On 2025-11-19 09:54, jh--- via Gcc-help wrote: > > Thank you for your answer. > > I'm not sure I understand it completely, could you give me some details? > > Le 2025-11-18 19:42, Florian Weimer a écrit : > >> * jh: > >> > >>> I don't really know where to look for this information. > >>> Is it possible to use the CPU status flags to communicate information > >>> between inline assembly and the normal C control flow? > >>> For example, an asm statement would set the Z flag and then the C code > >>> would jump (for example with beq or bne in the case of ARM) without > >>> using any additional variable and comparison instruction. Using a > >>> dummy variable is no issue if the generated code is just the > >>> conditional branch instruction. > >> > >> Do you mean something like this? > >> > >> commit 119d658ac2aad88e306b4a66c1717e5ebf86c73f > >> Author: Uros Bizjak <[email protected]> > >> Date: Fri Aug 29 09:05:23 2025 +0200 > >> > >> x86: Use flag output operands for inline asm in atomic-machine.h > >> > >> Use the flag output constraints feature available in gcc 6+ > >> ("=@cc<cond>") instead of explicitly setting a boolean variable > >> with SETcc instruction. This approach decouples the instruction > >> that sets the flags from the code that consumes them, allowing > >> the compiler to create better code when working with flags users. > > Does this "=@cc<cond>" also work for ARM? Is the usage of the conditions documented > > somewhere (like Z is ==0, N==V is signed >=0). I know where to find the ARM > > definitions, but is there a place where I can check gcc's interpretation (i.e. > > which C code generates which flag access)? > >> Instead of e.g.: > >> > >> lock add %esi,(%rdi) > >> sets %sil > >> test %sil,%sil > >> jne <...> > >> > >> the compiler now generates: > >> > >> lock add %esi,(%rdi) > >> js <...> > > How is this code integrated into C? Would it be used like this? But can I get the > > -6 value at the same time? > > if(asm_add(36, -42)<0){ > > printf("negative\n"); > > }else{ > > printf("positive\n"); > > } > > If yes, is it possible to at the same time set a register value and the flags and > > how would that be written? > > For example, I would like to be able to set a register to any value, but when I set > > it to 0, I would like to set the Z flag (to 1 or 0) and I would like the compiler > > to jump depending on my Z flag, while being able to use the register value later in > > the C code (not going through memory as is done in the commit). > >> > >> No functional changes intended. > >> > >> Signed-off-by: Uros Bizjak <[email protected]> > >> Cc: H.J.Lu <[email protected]> > >> Cc: Florian Weimer <[email protected]> > >> Cc: Carlos O'Donell <[email protected]> > >> Reviewed-by: Florian Weimer <[email protected]> > >> > >> <https://sourceware.org/cgit/glibc/commit/?id=119d658ac2aad88e306b4a66c1717e5ebf86c73f> > >> > >> > >> Thanks, > >> Florian > > Best regards, > > JH >