Re: [PATCH v1 0/1] AArch64: Relax regexps in tests to let them pass with -fweb

Drea Pinski (pinskia) <[email protected]> requested changes to the code:


> +++ gcc/testsuite/gcc.target/aarch64/ffs.c
> @@ -13,2 +12,2 @@
> -**	clz	w0, w0
> -**	csinc	w0, wzr, w0, eq
> +**	rbit	(w[0-9]+), w1
> +**	clz	\1, \1
`clz	(w[0-9]+), \1`

And then:
`csinc	w0, wzr, \2, eq`

So you don't need to depend on the register that is allocated to clz to be the same.

> +++ gcc/testsuite/gcc.target/aarch64/ffs.c
> @@ -28,1 +26,3 @@
> -**	csinc	x0, xzr, x0, eq
> +**	rbit	(x[0-9]+), x1
> +**	clz	\1, \1
> +**	csinc	x0, xzr, \1, eq
Likewise.


--
https://forge.sourceware.org/gcc/gcc/pulls/209#issuecomment-7001