[PATCH v5 1/3] aarch64: Fix comments for register constraints
Wilco Dijkstra <[email protected]> Tue, 4 Aug 2026 14:53:31 +0000
| Newsgroups | gmane.comp.gcc.patches |
|---|---|
| Message-ID | <PAWPR08MB8982788E345497C7FE0C263B83D42@PAWPR08MB8982.eurprd08.prod.outlook.com> |
Hi Karl,=0A= =0A= > The comments for the "w", "x" and "y" register constraints in=0A= > gcc/config/aarch64/constraints.md were misleading. They apply to SVE=0A= > registers as well as Advanced SIMD and FP registers.=0A= =0A= LGTM.=0A= =0A= Cheers,=0A= Wilco=