Re: [PATCH v2] RISC-V: Add new relocation type for global array accesses with non-constant indices

Jeffrey Law <[email protected]> Wed, 5 Aug 2026 17:42:55 -0600
Newsgroups gmane.comp.gcc.patches
Message-ID <[email protected]>

On 7/29/2026 4:10 AM, Liqin Weng wrote:
> From: wengliqin <[email protected]>
>
> gcc/ChangeLog:
>
> 	* config.gcc: Add riscv-fold-base-idx.cc to riscv extra_objs.
> 	* config/riscv/bitmanip.md: Update sh1add/sh2add/sh3add/add.uw patterns.
> 	* config/riscv/riscv-passes.def:  Add fold-base-idx pass.
> 	* config/riscv/riscv-protos.h: Add fold_base_idx_pass prototype.
> 	* config/riscv/riscv.cc: Add base_idx_add symbol.
> 	* config/riscv/riscv.md: Update add patterns.
> 	* config/riscv/t-riscv: Add riscv-fold-base-idx.cc to build rules.
> 	* config/riscv/riscv-fold-base-idx.cc: Implement fold-base-idx optimization pass for RISC-V to optimize global array accesses.
>
> gcc/testsuite/ChangeLog:
>
> 	* gcc.target/riscv/fold-base-idx-array-1.c: New test.
> 	* gcc.target/riscv/fold-base-idx-array-2.c: New test.
> 	* gcc.target/riscv/fold-base-idx-array-3.c: New test.
> 	* gcc.target/riscv/fold-base-idx-array-4.c: New test.
> 	* gcc.target/riscv/fold-base-idx-array-5.c: New test.
> 	* gcc.target/riscv/fold-base-idx-array-6.c: New test.
> 	* gcc.target/riscv/fold-base-idx-array-7.c: New test.
> 	* gcc.target/riscv/fold-base-idx-strcut-1.c: New test.
> 	* gcc.target/riscv/fold-base-idx-strcut-2.c: New test.
As I noted before, I don't see any justification for using an UNSPEC in 
here.  UNSPECS are to be used when we can not reasonably describe the 
semantics of the instruction in RTL.

I really don't want to see a new pass for this.  I know you indicated it 
was hard, but I'd like to see more details about why it was hard to make 
this work in the existing passes.

Given this depends on significantly new assembler behavior, the patterns 
will need to be conditional on testing the assembler's behavior.  
Otherwise if someone were to use a new compiler with an older assembler 
they'll get errors.

Is the new syntax for these instruction variants documented anywhere?

jeff