Re: [PATCH] RISC-V: Don't synthesize VLS vector constants.

On 8/5/2026 1:26 PM, Robin Dapp wrote:
> Hi,
>
> In PR126550 I noticed that we expand a constant vector using a "VLA"
> stepped-pattern expansion with several ops (vid, shift, add) while we
> could just load the constant from the constant pool.  On top, this
> particular expansion uses a different constant that it stores in the
> constant pool anyway, so it's twice as bad.  Until we have better
> heuristics, this patch forces known-length vector constants to memory.
>
> Regtested on rv64gcv_zvl512b.
>
> Regards
>   Robin
>
> gcc/ChangeLog:
>
> 	* config/riscv/riscv-v.cc (expand_const_vector): Force VLS
> 	constants to mem.
>
> gcc/testsuite/ChangeLog:
>
> 	* gcc.target/riscv/rvv/autovec/pr126550-2.c: Expect
> 	constant-pool vector load.
Per the discussion in the patchwork meeting.  This is quite sensible for 
any nontrivial constant.  OK.

jeff