Re: [PATCH v4 1/5] RISC-V: Improve macro-fusion dump o utput and comments

> On 7/29/2026 1:15 AM, Jin Ma wrote:
> > No new macro-fusion functionality is added.  Include both
> > instruction UIDs in dump messages so consecutive matches can be
> > distinguished, and report ZEXTW and ZEXTWS with their actual fusion types.
> > Document existing fusion recognizers consistently to make their RTL
> > relationships and constraints easier to understand.
> >
> > Keep each table entry tied to one fusion operation and use the common
> > enablement helper.
> >
> > gcc/ChangeLog:
> >
> >  * config/riscv/riscv-fusion.cc (riscv_fuse_zext_common): New function.
> >  (riscv_fuse_zextw): Likewise.
> >  (riscv_fuse_zextws): Use riscv_fuse_zext_common and document RTL
> >  relationships and constraints.
> >  (riscv_fuse_zexth): Use riscv_fuse_zext_common.
> >  (riscv_fuse_ldindexed): Document RTL relationships and constraints.
> >  (riscv_fuse_expanded_ld): Likewise.
> >  (riscv_fuse_ldpreincrement): Likewise.
> >  (riscv_fuse_lui_addi): Likewise.
> >  (riscv_fuse_auipc_addi): Likewise.
> >  (riscv_fuse_lui_ld): Likewise.
> >  (riscv_fuse_auipc_ld): Likewise.
> >  (riscv_fuse_cache_aligned_std): Likewise.
> >  (riscv_fuse_aligned_std): Likewise.
> >  (riscv_fuse_bfext): Likewise.
> >  (riscv_fuse_b_alui): Likewise.
> >  (riscv_fusion_entry::op): Rename from op_flags and use an enum.
> >  (riscv_fusion_table): Split ZEXTW and ZEXTWS entries.
> >  (riscv_macro_fusion_pair_p): Use riscv_fusion_enabled_p and print
> >  instruction UIDs.
> >
> > gcc/testsuite/ChangeLog:
> >
> >  * gcc.target/riscv/fusion-zextw-2.c: Expect the ZEXTW dump name.
> >  * gcc.target/riscv/fusion-zextw.c: Likewise.
> > ---
> >   gcc/config/riscv/riscv-fusion.cc              | 261 +++++++++++++-----
> >   .../gcc.target/riscv/fusion-zextw-2.c         |   2 +-
> >   gcc/testsuite/gcc.target/riscv/fusion-zextw.c |   2 +-
> >   3 files changed, 192 insertions(+), 73 deletions(-)
> >
> > diff --git a/gcc/config/riscv/riscv-fusion.cc b/gcc/config/riscv/riscv-fusion.cc
> > index 4846dc0dfa2..c766ace60af 100644
> > --- a/gcc/config/riscv/riscv-fusion.cc
> > +++ b/gcc/config/riscv/riscv-fusion.cc
> >
> > @@ -112,7 +112,7 @@ riscv_set_is_adduw_p (rtx set)
> >  
> >   /* Matches a shNadd:
> >     (set (reg:DI rd)
> > -       (plus:DI (ashift:DI (reg:DI rs1) (const_int N)) (reg:DI rS2)) */
> > +       (plus:DI (ashift:DI (reg:DI rs1) (const_int N)) (reg:DI rs2))) */
> You might consider dropping the modes here too.  Consider that 
> pre-approved or include it in this patch.  Your call.  Either way it 
> doesn't require another review round.  Similarly for any other cases 
> where the pattern is valid for rv32 or rv64.

I will take this suggestion and drop the modes here and from the other
RTL examples that apply to both RV32 and RV64.  I will fold these
comment changes into this patch rather than send a separate cleanup
patch.

> OK for the trunk.  Thanks for cleaning this stuff up.
>
> jeff

Thanks.  Once the usual testing completes successfully, I will commit
the combined patch to trunk. Thank you for the review and approval.

BR,
Jin