Re: [PATCH] LoongArch: improve 64-bit bitwise AND operation
Xi Ruoyao <[email protected]>
| Newsgroups | gmane.comp.gcc.patches |
|---|---|
| Message-ID | <[email protected]> |
在 2026/8/10 09:33, Ben Shi 写道: > Shall we still use `define_insn_and_split` at first ? At least it does > emit more efficient assembly. It may not as I've explained. If the AND operation is in a loop, materializing the mask out before the loop and then reuse it in the loop with a normal and instruction would be more efficient. And we don't know if the uarch has a shunt allowing lu12i.w + addi.d + lu32i.d + lu52i.d + and to finish in one cycle instead of two cycles of the bstrins pair. We may need some benchmark number (of real or well-known workloads like SPEC CPU) to demonstrate which is better, instead of using eyes. > The solution you suggested involved changes to immediate > materializing, which seems tricky, and I need more time to calculate a > best form. We didn't suggest that. Jeff said it may be better to do that in the expand pass and I said the cost model does not like your change and will undo that (if it's done in expand). Using split just bypasses the code model and it will make the GCC code base logically inconsistent (the cost model says materializing the const is better, but the split rule says otherwise). Yes it may be already inconsistent at some places now but don't worsen the situation. And we still have 5 months before feature freeze (stage 4) of GCC 17. To me there's plenty of time to gather the benchmark number and perhaps adjust the cost model if needed.