[PATCH v1] testsuite: use valid ARM GPR pair in asm-hard-reg-6.c [PR124328]

From: Torbjörn SVENSSON <[email protected]>

For armv8.1-m.main targets, `long long` needs to be placed in an even
numbered register pair.

Using r3 gives errors like for the long long operand:

asm-hard-reg-6.c:61:3: error: register r3 for operand 1 isn't suitable for data type

gcc/testsuite/ChangeLog:

	PR testsuite/124328
	* gcc.dg/asm-hard-reg-6.c: Swap value in r2 and r3.

Signed-off-by: Torbjörn SVENSSON <[email protected]>
---
I've tested this change on top of r17-2833-g32657f29f91871 and r16-9480-g967a69a03886ebd6.

Ok for trunk and releases/gcc-16?

--



This is a forge pull request published on the gcc-patches mailing list mailing list
as requested by Torbjörn Svensson via Sourceware Forge <[email protected]>.
Forge discussion: https://forge.sourceware.org/gcc/gcc/pulls/217

Get it locally using:
```
git fetch forge-upstream "+refs/versioned_pull/217/*:refs/versioned_pull/217/*"
git switch -c "pr-217-v1" "refs/versioned_pull/217/1/head"
```
Or, download the patch at: https://forge.sourceware.org/gcc/gcc/pulls/217.diff
Created on: 2026-08-10 18:48:51+00:00
Latest update: 2026-08-10 18:52:06+00:00
Changes: 1 changed files, 4 additions, 4 deletions
Head revision: azoff/gcc ref pr/gcc.dg/asm-hard-reg-6.c commit 683be3e649177328f742d652329a5d9286115c5b 
Base revision: gcc/gcc ref trunk commit 32657f29f918712ad7110bd54d8ebb3bf6b0a2a8 r17-2833-g32657f29f91871
Merge base: 32657f29f918712ad7110bd54d8ebb3bf6b0a2a8
Requested Reviewers: 

Changed files:
- M: gcc/testsuite/gcc.dg/asm-hard-reg-6.c

 gcc/testsuite/gcc.dg/asm-hard-reg-6.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/gcc/testsuite/gcc.dg/asm-hard-reg-6.c b/gcc/testsuite/gcc.dg/asm-hard-reg-6.c
index c87a8116a8697..b04708a290d67 100644
--- a/gcc/testsuite/gcc.dg/asm-hard-reg-6.c
+++ b/gcc/testsuite/gcc.dg/asm-hard-reg-6.c
@@ -11,10 +11,10 @@
 /* { dg-final { scan-assembler-times "bar\tx2,\\\[x1\\\]" 1 { target { aarch64*-*-* } } } } */
 #elif defined (__arm__)
 # define GPR1 "{r1}"
-# define GPR2 "{r2}"
-# define GPR3 "{r3}"
-/* { dg-final { scan-assembler-times "foo\tr1,r3" 1 { target { arm*-*-* } } } } */
-/* { dg-final { scan-assembler-times "bar\tr2,\\\[r1\\\]" 1 { target { arm*-*-* } } } } */
+# define GPR2 "{r3}"
+# define GPR3 "{r2}"
+/* { dg-final { scan-assembler-times "foo\tr1,r2" 1 { target { arm*-*-* } } } } */
+/* { dg-final { scan-assembler-times "bar\tr3,\\\[r1\\\]" 1 { target { arm*-*-* } } } } */
 #elif defined (__i386__)
 # define GPR1 "{eax}"
 # define GPR2 "{ebx}"
-- 
2.54.0