RE: [PATCH v3 7/7][X86] Add Sub-byte element extration and Symmetric-signed saturation narrow support.
"Liu, Hongtao" <[email protected]>
| Newsgroups | gmane.comp.gcc.patches |
|---|---|
| Message-ID | <DS4PPF240F42FB706CEAEB2B0561E6A086FE5DA2@DS4PPF240F42FB7.namprd11.prod.outlook.com> |
> -----Original Message----- > From: Jiang, Haochen <[email protected]> > Sent: Friday, August 14, 2026 2:52 PM > To: Dipesh Sharma <[email protected]>; [email protected] > Cc: Liu, Hongtao <[email protected]>; [email protected]; > [email protected]; Venkataramanan Kumar > <[email protected]> > Subject: RE: [PATCH v3 7/7][X86] Add Sub-byte element extration and > Symmetric-signed saturation narrow support. > > > From: Dipesh Sharma <[email protected]> > > Sent: Thursday, August 13, 2026 6:12 PM > > Patch LGTM with minor changes. @Dipesh Sharma Ok for the trunk with those changes. > > > diff --git a/gcc/config/i386/i386-builtin.def b/gcc/config/i386/i386- > > builtin.def index ad963e9011b..84f23239326 100644 > > --- a/gcc/config/i386/i386-builtin.def > > +++ b/gcc/config/i386/i386-builtin.def > > @@ -523,6 +523,12 @@ BDESC (OPTION_MASK_ISA_64BIT, > > OPTION_MASK_ISA2_MOVRS | OPTION_MASK_ISA2_AVX10_2, BDESC > > (OPTION_MASK_ISA_64BIT, OPTION_MASK_ISA2_MOVRS | > > OPTION_MASK_ISA2_AVX10_2, CODE_FOR_avx10_2_vmovrsqv2di_mask, > > "__builtin_ia32_vmovrsq128_mask", IX86_BUILTIN_VMOVRSQ_128, > UNKNOWN, > > (int) V2DI_FTYPE_PCV2DI_V2DI_UQI) BDESC (OPTION_MASK_ISA_64BIT, > > OPTION_MASK_ISA2_MOVRS | OPTION_MASK_ISA2_AVX10_2, > > CODE_FOR_avx10_2_vmovrswv8hi_mask, > > "__builtin_ia32_vmovrsw128_mask", IX86_BUILTIN_VMOVRSW_128, > UNKNOWN, > > (int) V8HI_FTYPE_PCV8HI_V8HI_UQI) > > > > +/* AVX10V2AUX. */ > > +BDESC (0, OPTION_MASK_ISA2_AVX10V2AUX, > > CODE_FOR_avx10v2aux_sym_truncatev4siv4qi2_mask_store_2, > > "__builtin_ia32_vpmovssdb128mem_mask", > > IX86_BUILTIN_VPMOVSSDB128_MEM, UNKNOWN, (int) > > VOID_FTYPE_PUSI_V4SI_UQI) > > +BDESC (0, OPTION_MASK_ISA2_AVX10V2AUX, > > CODE_FOR_avx10v2aux_sym_truncatev8siv8qi2_mask_store_2, > > "__builtin_ia32_vpmovssdb256mem_mask", > > IX86_BUILTIN_VPMOVSSDB256_MEM, UNKNOWN, (int) > > VOID_FTYPE_PUDI_V8SI_UQI) > > +BDESC (0, OPTION_MASK_ISA2_AVX10V2AUX, > > CODE_FOR_avx10v2aux_sym_truncatev16siv16qi2_mask_store, > > "__builtin_ia32_vpmovssdb512mem_mask", > > IX86_BUILTIN_VPMOVSSDB512_MEM, UNKNOWN, (int) > > VOID_FTYPE_PV16QI_V16SI_UHI) > > + > > + > > Please do not add two blank lines here, just one and similar for ... > > > BDESC_END (SPECIAL_ARGS, PURE_ARGS) > > > > /* AVX */ > > @@ -3427,6 +3433,13 @@ BDESC (0, OPTION_MASK_ISA2_AVX10V2AUX, > > CODE_FOR_vcvtbf62hf8v64qi_mask, "__builti BDESC (0, > > OPTION_MASK_ISA2_AVX10V2AUX, CODE_FOR_vcvthf62hf8v16qi_mask, > > "__builtin_ia32_vcvthf62hf8128_mask", > > IX86_BUILTIN_VCVTHF62HF8128_MASK, UNKNOWN, (int) > > V16QI_FTYPE_V16QI_V16QI_UHI) > > BDESC (0, OPTION_MASK_ISA2_AVX10V2AUX, > > CODE_FOR_vcvthf62hf8v32qi_mask, > "__builtin_ia32_vcvthf62hf8256_mask", > > IX86_BUILTIN_VCVTHF62HF8256_MASK, UNKNOWN, (int) > > V32QI_FTYPE_V32QI_V32QI_USI) > > BDESC (0, OPTION_MASK_ISA2_AVX10V2AUX, > > CODE_FOR_vcvthf62hf8v64qi_mask, > "__builtin_ia32_vcvthf62hf8512_mask", > > IX86_BUILTIN_VCVTHF62HF8512_MASK, UNKNOWN, (int) > > V64QI_FTYPE_V64QI_V64QI_UDI) > > +BDESC (0, OPTION_MASK_ISA2_AVX10V2AUX, > > CODE_FOR_vunpackbv16qi_mask, "__builtin_ia32_vunpackb128_mask", > > IX86_BUILTIN_VUNPACKB128_MASK, UNKNOWN, (int) > > V16QI_FTYPE_V16QI_INT_V16QI_UHI) > > +BDESC (0, OPTION_MASK_ISA2_AVX10V2AUX, > > CODE_FOR_vunpackbv32qi_mask, "__builtin_ia32_vunpackb256_mask", > > IX86_BUILTIN_VUNPACKB256_MASK, UNKNOWN, (int) > > V32QI_FTYPE_V32QI_INT_V32QI_USI) > > +BDESC (0, OPTION_MASK_ISA2_AVX10V2AUX, > > CODE_FOR_vunpackbv64qi_mask, "__builtin_ia32_vunpackb512_mask", > > IX86_BUILTIN_VUNPACKB512_MASK, UNKNOWN, (int) > > V64QI_FTYPE_V64QI_INT_V64QI_UDI) > > +BDESC (0, OPTION_MASK_ISA2_AVX10V2AUX, > > CODE_FOR_avx10v2aux_sym_truncatev4siv4qi2_mask, > > "__builtin_ia32_vpmovssdb128_mask", > > IX86_BUILTIN_VPMOVSSDB128_MASK, UNKNOWN, (int) > > V16QI_FTYPE_V4SI_V16QI_UQI) > > +BDESC (0, OPTION_MASK_ISA2_AVX10V2AUX, > > CODE_FOR_avx10v2aux_sym_truncatev8siv8qi2_mask, > > "__builtin_ia32_vpmovssdb256_mask", > > IX86_BUILTIN_VPMOVSSDB256_MASK, UNKNOWN, (int) > > V16QI_FTYPE_V8SI_V16QI_UQI) > > +BDESC (0, OPTION_MASK_ISA2_AVX10V2AUX, > > CODE_FOR_avx10v2aux_sym_truncatev16siv16qi2_mask, > > "__builtin_ia32_vpmovssdb512_mask", > > IX86_BUILTIN_VPMOVSSDB512_MASK, UNKNOWN, (int) > > V16QI_FTYPE_V16SI_V16QI_UHI) > > + > > ... here. > > > > > /* Builtins with rounding support. */ BDESC_END (ARGS, ROUND_ARGS) > > diff --git a/gcc/config/i386/i386-expand.cc > > b/gcc/config/i386/i386-expand.cc index fb4224af0da..7971ddce080 100644 > > --- a/gcc/config/i386/i386-expand.cc > > +++ b/gcc/config/i386/i386-expand.cc > > @@ -13322,6 +13322,9 @@ ix86_expand_args_builtin (const struct > > builtin_description *d, > > case V4DF_FTYPE_V8DF_INT_V4DF_UQI: > > case V4SF_FTYPE_V16SF_INT_V4SF_UQI: > > case V8DI_FTYPE_V8DI_INT_V8DI_UQI: > > + case V16QI_FTYPE_V16QI_INT_V16QI_UHI: > > + case V32QI_FTYPE_V32QI_INT_V32QI_USI: > > + case V64QI_FTYPE_V64QI_INT_V64QI_UDI: > > nargs = 4; > > mask_pos = 2; > > nargs_constant = 1; > > @@ -13453,6 +13456,8 @@ ix86_expand_args_builtin (const struct > > builtin_description *d, > > else if ((mask_pos && (nargs - i - mask_pos) == nargs_constant) || > > (!mask_pos && (nargs - i) <= nargs_constant)) > > { > > + > > + > > And also here redundant blank lines. > > > if (!match) > > switch (icode) > > { > > diff --git a/gcc/testsuite/g++.dg/other/i386-2.C > > b/gcc/testsuite/g++.dg/other/i386-2.C > > index aae565053dc..31775c203b9 100644 > > --- a/gcc/testsuite/g++.dg/other/i386-2.C > > +++ b/gcc/testsuite/g++.dg/other/i386-2.C > > @@ -1,5 +1,5 @@ > > /* { dg-do compile { target i?86-*-* x86_64-*-* } } */ > > -/* { dg-options "-O -pedantic-errors -march=k8 -msse4a -m3dnow -mavx > > - > > mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi - > > mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed - > > mprfchw -madx -mfxsr -mxsaveopt -msha -mxsavec -mxsaves -mclflushopt - > > mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mpconfig - > > mwbnoinvd -menqcmd -mavx512vp2intersect -mserialize -mtsxldtrk -mamx- > > tile -mamx-int8 -mamx-bf16 -mkl -mwidekl -mavxvnni -mavxifma - > > mavxvnniint8 -mavxneconvert -mcmpccxadd -mamx-fp16 -mprefetchi - > > mraoint -mamx-complex -mavxvnniint16 -msm3 -msha512 -msm4 - > > mavx10.2 -mamx-avx512 -mamx-fp8 -mmovrs -mamx-movrs" } */ > > +/* { dg-options "-O -pedantic-errors -march=k8 -msse4a -m3dnow -mavx > > +- > > mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi - > > mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed - > > mprfchw -madx -mfxsr -mxsaveopt -msha -mxsavec -mxsaves -mclflushopt - > > mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mpconfig - > > mwbnoinvd -menqcmd -mavx512vp2intersect -mserialize -mtsxldtrk -mamx- > > tile -mamx-int8 -mamx-bf16 -mkl -mwidekl -mavxvnni -mavxifma - > > mavxvnniint8 -mavxneconvert -mcmpccxadd -mamx-fp16 -mprefetchi - > > mraoint -mamx-complex -mavxvnniint16 -msm3 -msha512 -msm4 - > > mavx10.2 -mamx-avx512 -mamx-fp8 -mmovrs -mamx-movrs - > mavx10v2aux" } > > */ > > /* { dg-skip-if "requires hosted libstdc++ for cstdlib malloc" { ! > > hostedlib } } */ > > > > /* Test that {,x,e,p,t,s,w,a,b,i}mmintrin.h, mm3dnow.h, fma4intrin.h, > > @@ -7,7 +7,7 @@ > > popcntintrin.h, fmaintrin.h, pkuintrin.h, avx512vpopcntdqintrin.h, > > gfniintrin.h, avx512bitalgintrin.h, avx512vp2intersectintrin.h, > > tsxldtrkintrin.h, amxtileintrin.h, amxint8intrin.h, amxbf16intrin.h, > > - avx512vp2intersectvlintrin.h and mm_malloc.h.h are usable > > + avx512vp2intersectvlintrin.h, avx10v2auxintrin.h and mm_malloc.h.h > > + are > > usable > > Please don't touch these lines. They are not adding new files anymore or the > list will be extreme huge. Similar for other cases. > > Thx, > Haochen