RE: [PATCHv2 0/7] Support ACEv1 instructions

"Jiang, Haochen" <[email protected]>
Newsgroups gmane.comp.gcc.patches
Message-ID <SJ5PPF77D28E3C20E7E6B9069D57D1D4E8EECA52@SJ5PPF77D28E3C2.namprd11.prod.outlook.com>
Please disregard this. I will send an updated version in a minute.

The Changelog in the series is an outdated version.

Thx,
Haochen

> From: Haochen Jiang <[email protected]>
> Sent: Wednesday, August 19, 2026 11:17 AM
> 
> Hi all,
> 
> AVX10_V2_AUX patches has all landed on trunk now so it is time
> for ACEv1 patches.
> 
> One thing notable to be mentioned is that the intrin names in
> current ACE documentation are not following naming convention.
> They should be changed and should not be referenced. When
> implementing, we have synced with our LLVM folks on those names
> and we have reached the agreement since there are some special
> cases in ACE. I have also relayed this message to LLVM community.
> I will summarize a guide to their PR to make sure everything is
> aligned.
> 
> In this v2 patch series, we addressed the comments in previous
> thread, including:
> 
>   - Add 'tmm' naming in corresponding array to make it clear.
>   - Add negative test for incorrect tile register number.
>   - Fix typo in Changelog for bsr.
>   - Change SI to QI for tile register number in patterns.
> 
> One thing I did not address is mode attribute for outer product
> patterns because they are tile related and currently I am not
> sure what mode it should use.
> 
> Ok for trunk?
> 
> Attach previous cover letter as reference to recall:
> https://gcc.gnu.org/pipermail/gcc-patches/2026-July/722503.html
> 
> Thx,
> Haochen
>
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