[PATCH v1 0/7] RISC-V: Allow RVV register overlap for vw{add, sub, mul}[u].vx

From: Pan Li <[email protected]>

Like v[sz]ext.vf8, we continue the support for vw{add,sub,mul}[u].vx

The below test suites are passed for this patch:
1. The rv64gcv fully regression tests.

Pan Li (7):
  RISC-V: Allow RVV register overlap for vw{add,sub,mul}[u].vx
  RISC-V: Add test cases for vwadd.vx reg overlap
  RISC-V: Add test cases for vwaddu.vx reg overlap
  RISC-V: Add test cases for vwsub.vx reg overlap
  RISC-V: Add test cases for vwsubu.vx reg overlap
  RISC-V: Add test cases for vwmul.vx reg overlap
  RISC-V: Add test cases for vwmulu.vx reg overlap

 gcc/config/riscv/vector.md                    |  18 +--
 .../rvv/autovec/group_overlap/group_overlap.h | 127 ++++++++++++++++++
 .../autovec/group_overlap/vwadd_vx-i16-m1.c   |  18 +++
 .../autovec/group_overlap/vwadd_vx-i16-m2.c   |  18 +++
 .../autovec/group_overlap/vwadd_vx-i16-m4.c   |  18 +++
 .../autovec/group_overlap/vwadd_vx-i16-mf2.c  |  19 +++
 .../autovec/group_overlap/vwadd_vx-i16-mf4.c  |  19 +++
 .../autovec/group_overlap/vwadd_vx-i32-m1.c   |  18 +++
 .../autovec/group_overlap/vwadd_vx-i32-m2.c   |  18 +++
 .../autovec/group_overlap/vwadd_vx-i32-m4.c   |  18 +++
 .../autovec/group_overlap/vwadd_vx-i32-mf2.c  |  19 +++
 .../autovec/group_overlap/vwadd_vx-i8-m1.c    |  18 +++
 .../autovec/group_overlap/vwadd_vx-i8-m2.c    |  18 +++
 .../autovec/group_overlap/vwadd_vx-i8-m4.c    |  18 +++
 .../autovec/group_overlap/vwadd_vx-i8-mf2.c   |  19 +++
 .../autovec/group_overlap/vwadd_vx-i8-mf4.c   |  19 +++
 .../autovec/group_overlap/vwadd_vx-i8-mf8.c   |  19 +++
 .../autovec/group_overlap/vwaddu_vx-u16-m1.c  |  18 +++
 .../autovec/group_overlap/vwaddu_vx-u16-m2.c  |  18 +++
 .../autovec/group_overlap/vwaddu_vx-u16-m4.c  |  18 +++
 .../autovec/group_overlap/vwaddu_vx-u16-mf2.c |  19 +++
 .../autovec/group_overlap/vwaddu_vx-u16-mf4.c |  19 +++
 .../autovec/group_overlap/vwaddu_vx-u32-m1.c  |  18 +++
 .../autovec/group_overlap/vwaddu_vx-u32-m2.c  |  18 +++
 .../autovec/group_overlap/vwaddu_vx-u32-m4.c  |  18 +++
 .../autovec/group_overlap/vwaddu_vx-u32-mf2.c |  19 +++
 .../autovec/group_overlap/vwaddu_vx-u8-m1.c   |  18 +++
 .../autovec/group_overlap/vwaddu_vx-u8-m2.c   |  18 +++
 .../autovec/group_overlap/vwaddu_vx-u8-m4.c   |  18 +++
 .../autovec/group_overlap/vwaddu_vx-u8-mf2.c  |  19 +++
 .../autovec/group_overlap/vwaddu_vx-u8-mf4.c  |  19 +++
 .../autovec/group_overlap/vwaddu_vx-u8-mf8.c  |  19 +++
 .../autovec/group_overlap/vwmul_vx-i16-m1.c   |  18 +++
 .../autovec/group_overlap/vwmul_vx-i16-m2.c   |  18 +++
 .../autovec/group_overlap/vwmul_vx-i16-m4.c   |  18 +++
 .../autovec/group_overlap/vwmul_vx-i16-mf2.c  |  19 +++
 .../autovec/group_overlap/vwmul_vx-i16-mf4.c  |  19 +++
 .../autovec/group_overlap/vwmul_vx-i32-m1.c   |  18 +++
 .../autovec/group_overlap/vwmul_vx-i32-m2.c   |  18 +++
 .../autovec/group_overlap/vwmul_vx-i32-m4.c   |  18 +++
 .../autovec/group_overlap/vwmul_vx-i32-mf2.c  |  19 +++
 .../autovec/group_overlap/vwmul_vx-i8-m1.c    |  18 +++
 .../autovec/group_overlap/vwmul_vx-i8-m2.c    |  18 +++
 .../autovec/group_overlap/vwmul_vx-i8-m4.c    |  18 +++
 .../autovec/group_overlap/vwmul_vx-i8-mf2.c   |  19 +++
 .../autovec/group_overlap/vwmul_vx-i8-mf4.c   |  19 +++
 .../autovec/group_overlap/vwmul_vx-i8-mf8.c   |  19 +++
 .../autovec/group_overlap/vwmulu_vx-u16-m1.c  |  18 +++
 .../autovec/group_overlap/vwmulu_vx-u16-m2.c  |  18 +++
 .../autovec/group_overlap/vwmulu_vx-u16-m4.c  |  18 +++
 .../autovec/group_overlap/vwmulu_vx-u16-mf2.c |  19 +++
 .../autovec/group_overlap/vwmulu_vx-u16-mf4.c |  19 +++
 .../autovec/group_overlap/vwmulu_vx-u32-m1.c  |  18 +++
 .../autovec/group_overlap/vwmulu_vx-u32-m2.c  |  18 +++
 .../autovec/group_overlap/vwmulu_vx-u32-m4.c  |  18 +++
 .../autovec/group_overlap/vwmulu_vx-u32-mf2.c |  19 +++
 .../autovec/group_overlap/vwmulu_vx-u8-m1.c   |  18 +++
 .../autovec/group_overlap/vwmulu_vx-u8-m2.c   |  18 +++
 .../autovec/group_overlap/vwmulu_vx-u8-m4.c   |  18 +++
 .../autovec/group_overlap/vwmulu_vx-u8-mf2.c  |  19 +++
 .../autovec/group_overlap/vwmulu_vx-u8-mf4.c  |  19 +++
 .../autovec/group_overlap/vwmulu_vx-u8-mf8.c  |  19 +++
 .../autovec/group_overlap/vwsub_vx-i16-m1.c   |  18 +++
 .../autovec/group_overlap/vwsub_vx-i16-m2.c   |  18 +++
 .../autovec/group_overlap/vwsub_vx-i16-m4.c   |  18 +++
 .../autovec/group_overlap/vwsub_vx-i16-mf2.c  |  19 +++
 .../autovec/group_overlap/vwsub_vx-i16-mf4.c  |  19 +++
 .../autovec/group_overlap/vwsub_vx-i32-m1.c   |  18 +++
 .../autovec/group_overlap/vwsub_vx-i32-m2.c   |  18 +++
 .../autovec/group_overlap/vwsub_vx-i32-m4.c   |  18 +++
 .../autovec/group_overlap/vwsub_vx-i32-mf2.c  |  19 +++
 .../autovec/group_overlap/vwsub_vx-i8-m1.c    |  18 +++
 .../autovec/group_overlap/vwsub_vx-i8-m2.c    |  18 +++
 .../autovec/group_overlap/vwsub_vx-i8-m4.c    |  18 +++
 .../autovec/group_overlap/vwsub_vx-i8-mf2.c   |  19 +++
 .../autovec/group_overlap/vwsub_vx-i8-mf4.c   |  19 +++
 .../autovec/group_overlap/vwsub_vx-i8-mf8.c   |  19 +++
 .../autovec/group_overlap/vwsubu_vx-u16-m1.c  |  18 +++
 .../autovec/group_overlap/vwsubu_vx-u16-m2.c  |  18 +++
 .../autovec/group_overlap/vwsubu_vx-u16-m4.c  |  18 +++
 .../autovec/group_overlap/vwsubu_vx-u16-mf2.c |  19 +++
 .../autovec/group_overlap/vwsubu_vx-u16-mf4.c |  19 +++
 .../autovec/group_overlap/vwsubu_vx-u32-m1.c  |  18 +++
 .../autovec/group_overlap/vwsubu_vx-u32-m2.c  |  18 +++
 .../autovec/group_overlap/vwsubu_vx-u32-m4.c  |  18 +++
 .../autovec/group_overlap/vwsubu_vx-u32-mf2.c |  19 +++
 .../autovec/group_overlap/vwsubu_vx-u8-m1.c   |  18 +++
 .../autovec/group_overlap/vwsubu_vx-u8-m2.c   |  18 +++
 .../autovec/group_overlap/vwsubu_vx-u8-m4.c   |  18 +++
 .../autovec/group_overlap/vwsubu_vx-u8-mf2.c  |  19 +++
 .../autovec/group_overlap/vwsubu_vx-u8-mf4.c  |  19 +++
 .../autovec/group_overlap/vwsubu_vx-u8-mf8.c  |  19 +++
 92 files changed, 1792 insertions(+), 9 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_vx-i16-m1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_vx-i16-m2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_vx-i16-m4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_vx-i16-mf2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_vx-i16-mf4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_vx-i32-m1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_vx-i32-m2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_vx-i32-m4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_vx-i32-mf2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_vx-i8-m1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_vx-i8-m2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_vx-i8-m4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_vx-i8-mf2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_vx-i8-mf4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_vx-i8-mf8.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwaddu_vx-u16-m1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwaddu_vx-u16-m2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwaddu_vx-u16-m4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwaddu_vx-u16-mf2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwaddu_vx-u16-mf4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwaddu_vx-u32-m1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwaddu_vx-u32-m2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwaddu_vx-u32-m4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwaddu_vx-u32-mf2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwaddu_vx-u8-m1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwaddu_vx-u8-m2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwaddu_vx-u8-m4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwaddu_vx-u8-mf2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwaddu_vx-u8-mf4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwaddu_vx-u8-mf8.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmul_vx-i16-m1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmul_vx-i16-m2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmul_vx-i16-m4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmul_vx-i16-mf2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmul_vx-i16-mf4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmul_vx-i32-m1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmul_vx-i32-m2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmul_vx-i32-m4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmul_vx-i32-mf2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmul_vx-i8-m1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmul_vx-i8-m2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmul_vx-i8-m4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmul_vx-i8-mf2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmul_vx-i8-mf4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmul_vx-i8-mf8.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmulu_vx-u16-m1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmulu_vx-u16-m2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmulu_vx-u16-m4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmulu_vx-u16-mf2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmulu_vx-u16-mf4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmulu_vx-u32-m1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmulu_vx-u32-m2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmulu_vx-u32-m4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmulu_vx-u32-mf2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmulu_vx-u8-m1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmulu_vx-u8-m2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmulu_vx-u8-m4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmulu_vx-u8-mf2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmulu_vx-u8-mf4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwmulu_vx-u8-mf8.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwsub_vx-i16-m1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwsub_vx-i16-m2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwsub_vx-i16-m4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwsub_vx-i16-mf2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwsub_vx-i16-mf4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwsub_vx-i32-m1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwsub_vx-i32-m2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwsub_vx-i32-m4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwsub_vx-i32-mf2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwsub_vx-i8-m1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwsub_vx-i8-m2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwsub_vx-i8-m4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwsub_vx-i8-mf2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwsub_vx-i8-mf4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwsub_vx-i8-mf8.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwsubu_vx-u16-m1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwsubu_vx-u16-m2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwsubu_vx-u16-m4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwsubu_vx-u16-mf2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwsubu_vx-u16-mf4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwsubu_vx-u32-m1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwsubu_vx-u32-m2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwsubu_vx-u32-m4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwsubu_vx-u32-mf2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwsubu_vx-u8-m1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwsubu_vx-u8-m2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwsubu_vx-u8-m4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwsubu_vx-u8-mf2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwsubu_vx-u8-mf4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwsubu_vx-u8-mf8.c

-- 
2.43.0