Re: [PATCH 0/3] RISC-V: Support -march=native
Kito Cheng <[email protected]>
| Newsgroups | gmane.comp.gcc.patches |
|---|---|
| Message-ID | <CA+yXCZCbkJO7L90-7RfJ-2q+9q4yAKwE7Dc+sm2cDKdc3HfS4Q@mail.gmail.com> |
My plan is going to support -mcpu=native and -mtune=native once this patchset lands, and I guess...this might not be so interesting, so I will go ahead and commit this next week if no review comments :) Kito Cheng <[email protected]> 於 2026年8月20日週四 下午4:12寫道: > > This patch series adds support for -march=native. It detects the supported > extensions through hwprobe and /proc/cpuinfo, and includes /proc/cpuinfo data > from several real machines in the tests. > > Kito Cheng (3): > RISC-V: Move the hwprobe interface description into a .def file > RISC-V: Support -march=native on Linux hosts > RISC-V: Fall back on /proc/cpuinfo when hwprobe is unavailable > > gcc/common/config/riscv/riscv-common.cc | 15 +- > gcc/common/config/riscv/riscv-hwprobe.def | 146 +++++++ > gcc/common/config/riscv/riscv-hwprobe.h | 91 +++++ > gcc/config.host | 8 + > gcc/config/riscv/driver-riscv.cc | 378 ++++++++++++++++++ > gcc/config/riscv/riscv-subset.h | 1 + > gcc/config/riscv/riscv.h | 19 +- > gcc/config/riscv/x-riscv | 6 + > gcc/doc/invoke.texi | 10 + > .../gcc.target/riscv/cpunative/info_0 | 20 + > .../gcc.target/riscv/cpunative/info_1 | 10 + > .../gcc.target/riscv/cpunative/info_2 | 39 ++ > .../gcc.target/riscv/cpunative/info_3 | 71 ++++ > .../gcc.target/riscv/cpunative/info_4 | 287 +++++++++++++ > .../gcc.target/riscv/cpunative/native_cpu_0.c | 17 + > .../gcc.target/riscv/cpunative/native_cpu_1.c | 17 + > .../gcc.target/riscv/cpunative/native_cpu_2.c | 14 + > .../gcc.target/riscv/cpunative/native_cpu_3.c | 18 + > .../gcc.target/riscv/cpunative/native_cpu_4.c | 17 + > .../gcc.target/riscv/cpunative/native_cpu_5.c | 16 + > .../gcc.target/riscv/cpunative/native_cpu_6.c | 22 + > .../riscv/cpunative/riscv-cpunative.exp | 35 ++ > .../gcc.target/riscv/march-native-1.c | 21 + > gcc/testsuite/lib/target-supports.exp | 14 + > libgcc/config/riscv/feature_bits.c | 194 +-------- > 25 files changed, 1293 insertions(+), 193 deletions(-) > create mode 100644 gcc/common/config/riscv/riscv-hwprobe.def > create mode 100644 gcc/common/config/riscv/riscv-hwprobe.h > create mode 100644 gcc/config/riscv/driver-riscv.cc > create mode 100644 gcc/config/riscv/x-riscv > create mode 100644 gcc/testsuite/gcc.target/riscv/cpunative/info_0 > create mode 100644 gcc/testsuite/gcc.target/riscv/cpunative/info_1 > create mode 100644 gcc/testsuite/gcc.target/riscv/cpunative/info_2 > create mode 100644 gcc/testsuite/gcc.target/riscv/cpunative/info_3 > create mode 100644 gcc/testsuite/gcc.target/riscv/cpunative/info_4 > create mode 100644 gcc/testsuite/gcc.target/riscv/cpunative/native_cpu_0.c > create mode 100644 gcc/testsuite/gcc.target/riscv/cpunative/native_cpu_1.c > create mode 100644 gcc/testsuite/gcc.target/riscv/cpunative/native_cpu_2.c > create mode 100644 gcc/testsuite/gcc.target/riscv/cpunative/native_cpu_3.c > create mode 100644 gcc/testsuite/gcc.target/riscv/cpunative/native_cpu_4.c > create mode 100644 gcc/testsuite/gcc.target/riscv/cpunative/native_cpu_5.c > create mode 100644 gcc/testsuite/gcc.target/riscv/cpunative/native_cpu_6.c > create mode 100644 gcc/testsuite/gcc.target/riscv/cpunative/riscv-cpunative.exp > create mode 100644 gcc/testsuite/gcc.target/riscv/march-native-1.c > > -- > 2.53.0 >