[ARM EABI] Adjust 'libgomp.c++/target-cdtor-{1,2}.C' for 'targetm.cxx.use_aeabi_atexit' [PR119853, PR119854] (was: [Linaro-TCWG-CI] gcc-16-130-gaafe942227b: 10 regressions on arm)

Thomas Schwinge <[email protected]>
Newsgroups gmane.comp.gcc.regression,gmane.comp.gcc.patches,gmane.linux.linaro.toolchain
Message-ID <[email protected]> 
Hi!

On 2025-04-26T00:09:21+0000, ci_notify--- via Gcc-regression <[email protected]> wrote:
> Our automatic CI has detected problems related to your patch(es). Please find some details below.
>
> In gcc_check master-arm, after:
>   | commit gcc-16-130-gaafe942227b
>   | Author: Thomas Schwinge <[email protected]>
>   | Date:   Wed Apr 23 10:51:48 2025 +0200
>   | 
>   |     GCN, nvptx offloading: Host/device compatibility: Itanium C++ ABI, DSO Object Destruction API [PR119853, PR119854]
>   |     
>   |     '__dso_handle' for '__cxa_atexit', '__cxa_finalize'.  See
>   |     <https://itanium-cxx-abi.github.io/cxx-abi/abi.html#dso-dtor>.
>   |     
>   | ... 13 lines of the commit log omitted.
>
> Produces 10 regressions:
>   | 
>   | regressions.sum:
>   | Running libgomp:libgomp.c++/c++.exp ...
>   | FAIL: libgomp.c++/target-cdtor-1.C scan-tree-dump-times optimized "gimple_call <__cxa_atexit, " 4
>   | FAIL: libgomp.c++/target-cdtor-1.C scan-tree-dump-times optimized "gimple_call <__cxa_atexit, NULL, _ZN1SD1Ev, \\&sH1, \\&__dso_handle>" 1
>   | FAIL: libgomp.c++/target-cdtor-1.C scan-tree-dump-times optimized "gimple_call <__cxa_atexit, NULL, _ZN1SD1Ev, \\&sH2, \\&__dso_handle>" 1
>   | FAIL: libgomp.c++/target-cdtor-1.C scan-tree-dump-times optimized "gimple_call <__cxa_atexit, NULL, _ZN1SD1Ev, \\&sHD1, \\&__dso_handle>" 1
>   | ... and 6 more
>
> Used configuration :
>  *CI config* tcwg_gcc_check master-arm
>  *configure and test flags:* none, autodetected on armv8l-unknown-linux-gnueabihf
>
> We track this bug report under https://linaro.atlassian.net/browse/GNU-1568. 

Is it expected that I'm not able to log into the Jira instance, and that
most of the links in there are either:

| Secure Connection Failed
| 
| An error occurred during a connection to git-us.linaro.org. Cannot communicate securely with peer: no common encryption algorithm(s).

..., or:

| Oops!
| 
| Not Found
| 
| This page may not exist, or you may not have permission to see it.

> Please let us know if you have a fix.

I should have a fix: the attached
"Adjust 'libgomp.c++/target-cdtor-{1,2}.C' for 'targetm.cxx.use_aeabi_atexit' [PR119853, PR119854]"
ought to address this.  I've "mock-tested" this locally; is there a way
for me to run this through the Linaro "pre-commit" CI?


Grüße
 Thomas


> If you have any questions regarding this report, please ask on [email protected] mailing list.
>
> -----------------8<--------------------------8<--------------------------8<--------------------------
>
> The information below contains the details of the failures, and the ways to reproduce a debug environment:
>
> You can find the failure logs in *.log.1.xz files in
>  * https://ci.linaro.org/job/tcwg_gcc_check--master-arm-build/3752/artifact/artifacts/00-sumfiles/
> The full lists of regressions and improvements as well as configure and make commands are in
>  * https://ci.linaro.org/job/tcwg_gcc_check--master-arm-build/3752/artifact/artifacts/notify/
> The list of [ignored] baseline and flaky failures are in
>  * https://ci.linaro.org/job/tcwg_gcc_check--master-arm-build/3752/artifact/artifacts/sumfiles/xfails.xfail
>
> Current build   : https://ci.linaro.org/job/tcwg_gcc_check--master-arm-build/3752/artifact/artifacts
> Reference build : https://ci.linaro.org/job/tcwg_gcc_check--master-arm-build/3751/artifact/artifacts
>
> Instruction to reproduce the build : https://git-us.linaro.org/toolchain/ci/interesting-commits.git/plain/gcc/sha1/aafe942227baf8c2bcd4cac2cb150e49a4b895a9/tcwg_gcc_check/master-arm/reproduction_instructions.txt
>
> Full commit : https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=aafe942227baf8c2bcd4cac2cb150e49a4b895a9
0001-Adjust-libgomp.c-target-cdtor-1-2-.C-for-targetm.cxx.patch (text/x-diff, 7.3 KB) 
From 9a0449f23370b43098051a9861b6c153a2141844 Mon Sep 17 00:00:00 2001
From: Thomas Schwinge <[email protected]>
Date: Fri, 18 Jul 2025 12:56:13 +0200
Subject: [PATCH] Adjust 'libgomp.c++/target-cdtor-{1,2}.C' for
 'targetm.cxx.use_aeabi_atexit' [PR119853, PR119854]

Fix-up for commit aafe942227baf8c2bcd4cac2cb150e49a4b895a9
"GCN, nvptx offloading: Host/device compatibility: Itanium C++ ABI, DSO Object Destruction API [PR119853, PR119854]":
we need to adjust for 'targetm.cxx.use_aeabi_atexit':

    gcc/config/arm/arm.cc:#define TARGET_CXX_USE_AEABI_ATEXIT arm_cxx_use_aeabi_atexit

    gcc/config/arm/arm.cc:/* The EABI says __aeabi_atexit should be used to register static
    gcc/config/arm/arm.cc-   destructors.  */
    gcc/config/arm/arm.cc-
    gcc/config/arm/arm.cc-static bool
    gcc/config/arm/arm.cc:arm_cxx_use_aeabi_atexit (void)
    gcc/config/arm/arm.cc-{
    gcc/config/arm/arm.cc-  return TARGET_AAPCS_BASED;
    gcc/config/arm/arm.cc-}

..., which 'gcc/cp/decl.cc:get_atexit_node' then acts on: call '__aeabi_atexit'
instead of '__cxa_atexit', and swap two arguments.

	PR target/119853
	PR target/119854
	libgomp/
	* testsuite/libgomp.c++/target-cdtor-1.C: Adjust for
	'targetm.cxx.use_aeabi_atexit'.
	* testsuite/libgomp.c++/target-cdtor-2.C: Likewise.
---
 libgomp/testsuite/libgomp.c++/target-cdtor-1.C | 17 +++++++++++------
 libgomp/testsuite/libgomp.c++/target-cdtor-2.C | 17 +++++++++++------
 2 files changed, 22 insertions(+), 12 deletions(-)

diff --git a/libgomp/testsuite/libgomp.c++/target-cdtor-1.C b/libgomp/testsuite/libgomp.c++/target-cdtor-1.C
index ecb029e6b7d..7e8cc582e94 100644
--- a/libgomp/testsuite/libgomp.c++/target-cdtor-1.C
+++ b/libgomp/testsuite/libgomp.c++/target-cdtor-1.C
@@ -63,14 +63,19 @@ int main()
   return 0;
 }
 
-/* Verify '__cxa_atexit' calls.
+/* Verify '__cxa_atexit' calls (or '__aeabi_atexit', per 'targetm.cxx.use_aeabi_atexit').
 
    For the host, there are four expected calls:
-   { dg-final { scan-tree-dump-times {gimple_call <__cxa_atexit, } 4 optimized { target cxa_atexit } } }
-   { dg-final { scan-tree-dump-times {gimple_call <__cxa_atexit, NULL, _ZN1SD1Ev, \&sH1, \&__dso_handle>} 1 optimized { target cxa_atexit } } }
-   { dg-final { scan-tree-dump-times {gimple_call <__cxa_atexit, NULL, _ZN1SD1Ev, \&sHD1, \&__dso_handle>} 1 optimized { target cxa_atexit } } }
-   { dg-final { scan-tree-dump-times {gimple_call <__cxa_atexit, NULL, _ZNSt6vectorI1SSaIS0_EED1Ev, \&svHD1, \&__dso_handle>} 1 optimized { target cxa_atexit } } }
-   { dg-final { scan-tree-dump-times {gimple_call <__cxa_atexit, NULL, _ZN1SD1Ev, \&sH2, \&__dso_handle>} 1 optimized { target cxa_atexit } } }
+   { dg-final { scan-tree-dump-times {gimple_call <__cxa_atexit, } 4 optimized { target { cxa_atexit && { ! arm_eabi } } } } }
+     { dg-final { scan-tree-dump-times {gimple_call <__aeabi_atexit, } 4 optimized { target { cxa_atexit && arm_eabi } } } }
+   { dg-final { scan-tree-dump-times {gimple_call <__cxa_atexit, NULL, _ZN1SD1Ev, \&sH1, \&__dso_handle>} 1 optimized { target { cxa_atexit && { ! arm_eabi } } } } }
+     { dg-final { scan-tree-dump-times {gimple_call <__aeabi_atexit, NULL, \&sH1, _ZN1SD1Ev, \&__dso_handle>} 1 optimized { target { cxa_atexit && arm_eabi } } } }
+   { dg-final { scan-tree-dump-times {gimple_call <__cxa_atexit, NULL, _ZN1SD1Ev, \&sHD1, \&__dso_handle>} 1 optimized { target { cxa_atexit && { ! arm_eabi } } } } }
+     { dg-final { scan-tree-dump-times {gimple_call <__aeabi_atexit, NULL, \&sHD1, _ZN1SD1Ev, \&__dso_handle>} 1 optimized { target { cxa_atexit && arm_eabi } } } }
+   { dg-final { scan-tree-dump-times {gimple_call <__cxa_atexit, NULL, _ZNSt6vectorI1SSaIS0_EED1Ev, \&svHD1, \&__dso_handle>} 1 optimized { target { cxa_atexit && { ! arm_eabi } } } } }
+     { dg-final { scan-tree-dump-times {gimple_call <__aeabi_atexit, NULL, \&svHD1, _ZNSt6vectorI1SSaIS0_EED1Ev, \&__dso_handle>} 1 optimized { target { cxa_atexit && arm_eabi } } } }
+   { dg-final { scan-tree-dump-times {gimple_call <__cxa_atexit, NULL, _ZN1SD1Ev, \&sH2, \&__dso_handle>} 1 optimized { target { cxa_atexit && { ! arm_eabi } } } } }
+     { dg-final { scan-tree-dump-times {gimple_call <__aeabi_atexit, NULL, \&sH2, _ZN1SD1Ev, \&__dso_handle>} 1 optimized { target { cxa_atexit && arm_eabi } } } }
 
    For the device, there are two expected calls:
    { dg-final { scan-offload-tree-dump-times {gimple_call <__cxa_atexit, } 2 optimized { target cxa_atexit } } }
diff --git a/libgomp/testsuite/libgomp.c++/target-cdtor-2.C b/libgomp/testsuite/libgomp.c++/target-cdtor-2.C
index 75e48ca2f67..9c8512245b1 100644
--- a/libgomp/testsuite/libgomp.c++/target-cdtor-2.C
+++ b/libgomp/testsuite/libgomp.c++/target-cdtor-2.C
@@ -93,14 +93,19 @@ int main()
   return 0;
 }
 
-/* Verify '__cxa_atexit' calls.
+/* Verify '__cxa_atexit' calls (or '__aeabi_atexit', per 'targetm.cxx.use_aeabi_atexit').
 
    For the host, there are four expected calls:
-   { dg-final { scan-tree-dump-times {gimple_call <__cxa_atexit, } 4 optimized { target cxa_atexit } } }
-   { dg-final { scan-tree-dump-times {gimple_call <__cxa_atexit, NULL, _ZN1SD1Ev, \&sH1, \&__dso_handle>} 1 optimized { target cxa_atexit } } }
-   { dg-final { scan-tree-dump-times {gimple_call <__cxa_atexit, NULL, _ZN1SD1Ev, \&sHD1, \&__dso_handle>} 1 optimized { target cxa_atexit } } }
-   { dg-final { scan-tree-dump-times {gimple_call <__cxa_atexit, NULL, _ZNSt6vectorI1SSaIS0_EED1Ev, \&svHD1, \&__dso_handle>} 1 optimized { target cxa_atexit } } }
-   { dg-final { scan-tree-dump-times {gimple_call <__cxa_atexit, NULL, _ZN1SD1Ev, \&sH2, \&__dso_handle>} 1 optimized { target cxa_atexit } } }
+   { dg-final { scan-tree-dump-times {gimple_call <__cxa_atexit, } 4 optimized { target { cxa_atexit && { ! arm_eabi } } } } }
+     { dg-final { scan-tree-dump-times {gimple_call <__aeabi_atexit, } 4 optimized { target { cxa_atexit && arm_eabi } } } }
+   { dg-final { scan-tree-dump-times {gimple_call <__cxa_atexit, NULL, _ZN1SD1Ev, \&sH1, \&__dso_handle>} 1 optimized { target { cxa_atexit && { ! arm_eabi } } } } }
+     { dg-final { scan-tree-dump-times {gimple_call <__aeabi_atexit, NULL, \&sH1, _ZN1SD1Ev, \&__dso_handle>} 1 optimized { target { cxa_atexit && arm_eabi } } } }
+   { dg-final { scan-tree-dump-times {gimple_call <__cxa_atexit, NULL, _ZN1SD1Ev, \&sHD1, \&__dso_handle>} 1 optimized { target { cxa_atexit && { ! arm_eabi } } } } }
+     { dg-final { scan-tree-dump-times {gimple_call <__aeabi_atexit, NULL, \&sHD1, _ZN1SD1Ev, \&__dso_handle>} 1 optimized { target { cxa_atexit && arm_eabi } } } }
+   { dg-final { scan-tree-dump-times {gimple_call <__cxa_atexit, NULL, _ZNSt6vectorI1SSaIS0_EED1Ev, \&svHD1, \&__dso_handle>} 1 optimized { target { cxa_atexit && { ! arm_eabi } } } } }
+     { dg-final { scan-tree-dump-times {gimple_call <__aeabi_atexit, NULL, \&svHD1, _ZNSt6vectorI1SSaIS0_EED1Ev, \&__dso_handle>} 1 optimized { target { cxa_atexit && arm_eabi } } } }
+   { dg-final { scan-tree-dump-times {gimple_call <__cxa_atexit, NULL, _ZN1SD1Ev, \&sH2, \&__dso_handle>} 1 optimized { target { cxa_atexit && { ! arm_eabi } } } } }
+     { dg-final { scan-tree-dump-times {gimple_call <__aeabi_atexit, NULL, \&sH2, _ZN1SD1Ev, \&__dso_handle>} 1 optimized { target { cxa_atexit && arm_eabi } } } }
 
    For the device, there are two expected calls:
    { dg-final { scan-offload-tree-dump-times {gimple_call <__cxa_atexit, } 2 optimized { target cxa_atexit } } }
-- 
2.34.1
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