Re: [Linaro-TCWG-CI] gcc-17-577-gbc19036af435: 2 regressions on aarch64
Andrew Pinski via Gcc-regression <[email protected]>
| Newsgroups | gmane.comp.gcc.regression,gmane.comp.gcc.patches |
|---|---|
| Message-ID | <CALvbMcBAx-6RqVFi_zgWiniHGfWfd7bfrYXUuZBXOEfFGwBTvA@mail.gmail.com> |
On Thu, May 21, 2026 at 8:40 PM Andrew Pinski <[email protected]> wrote: > > On Thu, May 21, 2026 at 8:31 PM Jeffrey Law > <[email protected]> wrote: > > > > > > > > On 5/18/2026 9:39 PM, [email protected] wrote: > > > Dear contributor, > > > > > > Our automatic CI has detected problems related to your patch(es). Please find some details below. > > > > > > In aarch64 native, after: > > > | commit gcc-17-577-gbc19036af435 > > > | Author: Jeff Law <[email protected]> > > > | Date: Mon May 18 15:17:27 2026 -0600 > > > | > > > | [RISC-V] Improve ext-dce's live bit tracking for IOR/AND with a constant argument > > > | > > > | Investigation of a regression with some RISC-V target changes exposed a clear > > > | missed optimization in ext-dce.c > > > | > > > | ... 67 lines of the commit log omitted. > > > > > > Produces 2 regressions: > > > | > > > | regressions.sum: > > > | Running gcc:gcc.target/aarch64/aarch64.exp ... > > > | FAIL: gcc.target/aarch64/tbz_1.c check-function-bodies g1 > > > | FAIL: gcc.target/aarch64/tbz_1.c check-function-bodies g2 > > I've reproduced this locally. I haven't gotten into the debug cycle > > yet, but wanted folks to know it's mine AFAICT to avoid duplicating > > debugging efforts. > > I think the fix is just a testcase fix. > Currently the testcase has: > ** tbnz w[0-9]+, #?0, .L([0-9]+) > > But that should just can be: > ** tbnz [wx][0-9]+, #?0, .L([0-9]+) > > to match both x0 and w0 there. But are valid in this case with bit 0. > For both g1 and g2. Otherwise this is the fix to the backend: ``` diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index f7e2e4be10e..89f0c78e540 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -1091,6 +1091,8 @@ (define_insn "@aarch64_tbz<optab><ALLI:mode><GPI:mode>" return "tst\t%<ALLI:w>0, %1\;<bcond>\t%l2"; } } + else if (UINTVAL (operands[1]) <= 31) + return "<tbz>\t%w0, %1, %l2"; else return "<tbz>\t%<ALLI:w>0, %1, %l2"; } ``` But that might have more testcase fallout. I will go and test that one and see what other testcase fallout there is because I think we want this change anyways; the backend is moving towards using w form for things if possible anyways. Thanks Andrea > > Thanks, > Andrea > > > > > > jeff