Re: [PATCH v2 1/1] x86_64: Update overconstrained x86_64 tests

On Tue, Jul 28, 2026 at 8:48=E2=80=AFPM Dylan Rees <[email protected]> wro=
te:
>
> 'pr81501-9b.c' contains check-function-bodies directive
> which breaks down as a result of a CSE change. The explicit
> ordering has been removed and the test now checks for the
> components of the original check-function-bodies in any order.
>
> 'pr81501-9b.c' was failing due to over constrained scan-rtl-dump
> regexs. The pattern has been expanded to accomodate an equivalent
> representation which has come about as a result of the CSE changes.
> ---
>  gcc/testsuite/gcc.target/i386/pr124407-1.c |  5 +++--
>  gcc/testsuite/gcc.target/i386/pr81501-9b.c | 15 +--------------
>  2 files changed, 4 insertions(+), 16 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/i386/pr124407-1.c b/gcc/testsuite/g=
cc.target/i386/pr124407-1.c
> index e8fb0dd7872..c2f48fc0c3c 100644
> --- a/gcc/testsuite/gcc.target/i386/pr124407-1.c
> +++ b/gcc/testsuite/gcc.target/i386/pr124407-1.c
> @@ -14,5 +14,6 @@ foo()
>    v /=3D f;
>  }
>
> -/* { dg-final { scan-rtl-dump {\(set \(reg:V16QI 125\)} "x86_cse" { targ=
et { ! ia32 } } } } */
> -/* { dg-final { scan-rtl-dump {\(const_int 0 \[0\]\) repeated x16} "x86_=
cse" { target { ! ia32 } } } } */
> +/* { dg-final { scan-rtl-dump {\(set \(reg:V([0-9]+)(QI|SF) ([0-9]+)\)} =
"x86_cse" { target { ! ia32 } } } } */
> +/* { dg-final { scan-rtl-dump {(\(const_int 0 \[0\]\) repeated x16|\(con=
st_double:SF 0\.0 \[0x0\.0p\+0\]\) repeated x4)} "x86_cse" { target { ! ia3=
2 } } } } */

These are independent of x86_cse.  Just remove them and -fdump-rtl-x86_cse.

> +/* { dg-final { scan-assembler-times {movabsq[ \t]+\$4575657222473777152=
,[ \t]+%rax} 1 { target { ! ia32 } } } } */

OK.  It is generated by x86_cse:

Place:

(insn 35 9 13 2 (set (subreg:DI (reg:V2SF 125) 0)
        (const_int 4575657222473777152 [0x3f8000003f800000])) -1
     (nil))

after:

(note 9 8 35 2 NOTE_INSN_DELETED)

> diff --git a/gcc/testsuite/gcc.target/i386/pr81501-9b.c b/gcc/testsuite/g=
cc.target/i386/pr81501-9b.c
> index bd1b65d3e87..ffe40f9b373 100644
> --- a/gcc/testsuite/gcc.target/i386/pr81501-9b.c
> +++ b/gcc/testsuite/gcc.target/i386/pr81501-9b.c
> @@ -1,22 +1,9 @@
>  /* { dg-do compile { target *-*-linux* } } */
>  /* { dg-options "-O2 -march=3Dx86-64-v4 -fpic -fplt -mtls-dialect=3Dgnu2=
" } */
>  /* Keep labels and directives ('.cfi_startproc', '.cfi_endproc').  */
> -/* { dg-final { check-function-bodies "**" "" "" { target { ! ia32 } } {=
^\t?\.} } } */
> -/* Keep labels and directives ('.cfi_startproc', '.cfi_endproc').  */
> -
> -/*
> -**foo:
> -**.LFB[0-9]+:
> -**...
> -**     vpbroadcastb    %(edi|r\d+d), %zmm\d
> -**...
> -**     lea(l|q)        var@TLSDESC\(%rip\), %(e|r)ax
> -**...
> -**     call    \*var@TLSCALL\(%(e|r)ax\)
> -**...
> -*/

OK.

>  #include "pr81501-9a.c"
>
>  /* { dg-final { scan-assembler-times "vpbroadcastb" 1 } } */
> +/* { dg-final { scan-assembler-times {lea(l|q)[ \t]+var@TLSDESC\(%rip\),=
 %(e|r)ax} 1 { target { ! ia32 } } } } */

OK.


>  /* { dg-final { scan-assembler-times "call\[ \t\]\\*var@TLSCALL\\(%(?:r|=
e)ax\\)" 1 { target { ! ia32 } } } } */
> --
> 2.43.0
>


--
H.J.