[binutils-gdb] sim/sh: check PFSCR.PR setting for fldi0 and fldi1 insns

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=17eb89e3c1cc6098f08e77d257468486a5c04ce4

commit 17eb89e3c1cc6098f08e77d257468486a5c04ce4
Author: Oleg Endo <[email protected]>
Date:   Wed Mar 11 11:55:20 2026 +0900

    sim/sh: check PFSCR.PR setting for fldi0 and fldi1 insns
    
    On SH variants with double-precision FPU the insns fli0 and flid1 are only
    defined when FPSCR.PR = 0.  The hardware does not necessarily trap but might
    quietly load undefined values.  However, qemu traps in that case, so do the
    same.

Diff:
---
 sim/sh/gencode.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/sim/sh/gencode.c b/sim/sh/gencode.c
index 42009fc23e2..9c882d2378d 100644
--- a/sim/sh/gencode.c
+++ b/sim/sh/gencode.c
@@ -645,16 +645,20 @@ static op tab[] =
   /* sh2e */
   { "", "", "fldi0 <FREG_N>", "1111nnnn10001101",
     {
-      "SET_FR (n, (float) 0.0);",
-      "/* FIXME: check for DP and (n & 1) == 0?  */",
+      "if (FPSCR_PR)",
+      "  RAISE_EXCEPTION (SIGILL);",
+      "else",
+      "  SET_FR (n, (float) 0.0);",
     },
   },
 
   /* sh2e */
   { "", "", "fldi1 <FREG_N>", "1111nnnn10011101",
     {
-      "SET_FR (n, (float) 1.0);",
-      "/* FIXME: check for DP and (n & 1) == 0?  */",
+      "if (FPSCR_PR)",
+      "  RAISE_EXCEPTION (SIGILL);",
+      "else",
+      "  SET_FR (n, (float) 1.0);",
     },
   },