[binutils-gdb] gdb/riscv: use register number for 'info reg' output format choice

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=e5425f2687d66034a8d3fe94264cf99b42c1cb1a

commit e5425f2687d66034a8d3fe94264cf99b42c1cb1a
Author: Andrew Burgess <[email protected]>
Date:   Mon Feb 23 13:27:56 2026 +0000

    gdb/riscv: use register number for 'info reg' output format choice
    
    On RISC-V the 'info register' format for floating point registers
    includes the raw register value printed as hex.  While reviewing an
    upstream patch[1] I realised that this raw hex output was no longer
    working, but no tests had started to fail.
    
    Here's an example of the expected output:
    
      (gdb) info registers $ft0
      ft0            {float = 0, double = 0}  (raw 0x0000000000000000)
    
    It's the '(raw 0x0000000000000000)' part that was missing once I had
    applied series[1].
    
    This commit does a few things.  First, I've extended an existing test
    to check that the raw register value is printed.  I've updated the
    same test to use to '-wrap' option to gdb_test_multiple.  And in
    addition, in the case where the register type is a union (as in the
    above example), I've relaxed the test so we no longer assume that the
    field named 'float' is the first field of the union, a similar change
    was part of the upstream series I was reviewing[2], so I figured I
    might as well throw this in here.
    
    The reason that patch series[1] broke the raw output, is that in
    riscv_print_one_register_info, in order to identify a floating point
    register, we currently inspect the register's type.  If the register
    is of type float, or is a 2 or 3 element union, where each element is
    a float, then we consider the register a floating point register, and
    print it with the additional raw format.
    
    In this commit I've switched to just checking the register number.  If
    we're in the FP register range then we handle this as a floating point
    register.
    
    The code being changed here was introduced in commit:
    
      commit 270b9329b713fdc166f95dfa3a0a2f72f3a49608
      Date:   Mon Oct 22 14:10:13 2018 -0700
    
           RISC-V: Print FP regs as union of float types.
    
    The commit message seems to indicate that this code was only ever
    intended to identify the standard floating point registers, and I'm
    not aware of any other RISC-V registers that would need printing with
    the additional raw format, so I think the register number check should
    be fine.
    
    As such, there should be no user visible changes after this commit.
    
    [1] https://inbox.sourceware.org/gdb-patches/[email protected]
    [2] https://inbox.sourceware.org/gdb-patches/[email protected]
    
    Reviewed-By: Keith Seitz <[email protected]>

Diff:
---
 gdb/riscv-tdep.c                             | 11 +----------
 gdb/testsuite/gdb.arch/riscv-reg-aliases.exp |  6 +++---
 2 files changed, 4 insertions(+), 13 deletions(-)

diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c
index 4dfbd2ec2b8..ebecd1e79d5 100644
--- a/gdb/riscv-tdep.c
+++ b/gdb/riscv-tdep.c
@@ -1178,16 +1178,7 @@ riscv_print_one_register_info (struct gdbarch *gdbarch,
   print_raw_format = (val->entirely_available ()
 		      && !val->optimized_out ());
 
-  if (regtype->code () == TYPE_CODE_FLT
-      || (regtype->code () == TYPE_CODE_UNION
-	  && regtype->num_fields () == 2
-	  && regtype->field (0).type ()->code () == TYPE_CODE_FLT
-	  && regtype->field (1).type ()->code () == TYPE_CODE_FLT)
-      || (regtype->code () == TYPE_CODE_UNION
-	  && regtype->num_fields () == 3
-	  && regtype->field (0).type ()->code () == TYPE_CODE_FLT
-	  && regtype->field (1).type ()->code () == TYPE_CODE_FLT
-	  && regtype->field (2).type ()->code () == TYPE_CODE_FLT))
+  if (riscv_is_fp_regno_p (regnum))
     {
       struct value_print_options opts;
       const gdb_byte *valaddr = val->contents_for_printing ().data ();
diff --git a/gdb/testsuite/gdb.arch/riscv-reg-aliases.exp b/gdb/testsuite/gdb.arch/riscv-reg-aliases.exp
index f384917ed21..eb1caf87922 100644
--- a/gdb/testsuite/gdb.arch/riscv-reg-aliases.exp
+++ b/gdb/testsuite/gdb.arch/riscv-reg-aliases.exp
@@ -159,16 +159,16 @@ set skip_freg_tests 0
 set freg_extension "INVALID"
 set message "check format of float registers"
 gdb_test_multiple "info registers \$ft0" $message {
-    -re "Invalid register `ft0'\r\n$gdb_prompt $" {
+    -re -wrap "Invalid register `ft0'" {
 	set skip_freg_tests 1
 	set freg_extension "NONE"
 	pass $message
     }
-    -re "ft0 \+\[0-9\]\+.*\r\n$gdb_prompt $" {
+    -re -wrap "ft0 \+\[0-9\]\+.*" {
 	set freg_extension ""
 	pass $message
     }
-    -re "ft0 \+\{float = .*\r\n$gdb_prompt $" {
+    -re -wrap "ft0 \+\{\[^\}\]*float = \[^\}\]+\}\\s+\\(raw $hex\\)" {
 	set freg_extension ".float"
 	pass $message
     }