Re: Is this "gdb disassembler" code still needed?

"Maciej W. Rozycki" <[email protected]> writes:
> On Wed, 26 Jun 2013, Richard Sandiford wrote:
>
>> >  Other than that I am fairly sure the behaviour is intentional, so except 
>> > from any microMIPS change to match the MIPS16 variant please refrain from 
>> > fiddling with these bits until I am done with the change proposed here:
>> >
>> > http://sourceware.org/ml/binutils/2012-05/msg00183.html
>> > http://sourceware.org/ml/binutils/2012-06/msg00114.html
>> 
>> OK, thanks.  I'll change microMIPS to match MIPS16 like you say.
>
>  What happened to this code after your recent changes?  I get rubbish in 
> disassembly now, e.g.:
>
> Dump of assembler code for function t1:
>    0x00400991 <+0>:	save	a0-a3,32,ra,s1
>    0x00400995 <+4>:	addiu	s1,sp,16
>    0x00400997 <+6>:	lw	v1,0x4009f4 <t1+99>
>    0x00400999 <+8>:	lw	v0,0x4009f0 <t1+95>
>    0x0040099b <+10>:	move	t9,v1
>    0x0040099d <+12>:	move	t8,v0
>    0x0040099f <+14>:	lw	v0,24(s1)
>    0x004009a1 <+16>:	move	a1,t9
>    0x004009a3 <+18>:	move	a0,t8
>    0x004009a5 <+20>:	jal	0x400da0 <exit@mips16plt+15>
>    0x004009a9 <+24>:	nop
> [...]

Gah, sorry.  The code is still there, but I think in the MIPS16 case it's
being thwarted by an even base address.  Does this fix it?  (microMIPS
should be OK.)

Richard


opcodes/
	* mips-dis.c (print_mips16_insn_arg): Include ISA bit in base address.

Index: opcodes/mips-dis.c
===================================================================
--- opcodes/mips-dis.c	2013-07-31 18:16:42.972774949 +0100
+++ opcodes/mips-dis.c	2013-07-31 18:19:37.661036158 +0100
@@ -1565,7 +1565,7 @@ print_mips16_insn_arg (struct disassembl
 	     }
 	}
 
-      print_insn_arg (info, state, opcode, operand, baseaddr, uval);
+      print_insn_arg (info, state, opcode, operand, baseaddr + 1, uval);
       break;
     }
 }