can target code change architecture setting?

I’m working with riscv gdb support. One problem people occasionally
run into is that riscv has both 32- and 64-bit variants. The current
gdb code just assumes 64-bit by default (unless a file is specified,
and then it gets the info from the ELF info). If such a gdb connects
to a 32-bit target, bulk register reads end up wonky, and writes send
too much data which confuses OpenOCD. Currently the user needs to do
something like set arch riscv:rv32 to work around this.

Is it possible for riscv-tdep.c to have some kind of callback function
that is called when gdb connects to a server, and for that function to
change the register width? If so, gdb could read the riscv misa
(instruction set architecture information) register and transparently
reconfigure.

I looked, but I didn’t see any obvious callbacks that get called when
connecting to a target.

Thank you,
Tim