Re: gdb support for SME-without-SVE ?
Simon Marchi via Gdb <[email protected]> Tue, 27 Jan 2026 09:57:02 -0500
| Newsgroups | gmane.comp.gdb.devel |
|---|---|
| Message-ID | <[email protected]> |
On 2026-01-27 09:47, Peter Maydell wrote: > On Tue, 27 Jan 2026 at 14:21, Simon Marchi <[email protected]> wrote: >> >> >> >> On 2026-01-27 06:31, Peter Maydell via Gdb wrote: >>> Hi: is GDB for Arm intended to support configurations where the target >>> CPU has SME but not SVE? >>> >>> We're just implementing support for that in QEMU for using SME >>> with the hvf hypervisor accelerator on macos systems, but when >>> we tried connecting gdb to QEMU gdb crashed: >>> >>> (gdb) target remote localhost:1234 >>> Remote debugging using localhost:1234 >>> ../../gdb/aarch64-tdep.c:3068: internal-error: >>> aarch64_pseudo_register_type: bad register number 160 >>> A problem internal to GDB has been detected, >>> further debugging may prove unreliable. >>> Fatal signal: Abort trap: 6 >>> >>> https://lore.kernel.org/qemu-devel/CAAjaMXZLG2aBtStRhyvmdENj1Z+Mx05BmDgyYUoYrc_ZnHwyVQ@mail.gmail.com/ >>> >>> Is this a known missing feature in GDB, or is it a config that's >>> supposed to work but we've got the XML register description wrong >>> somehow? >>> >>> It looks from the aarch64-tdep.c code like perhaps GDB assumes >>> that the Vn vector registers only exist with SVE, but they also >>> exist in SME-only CPUs. >> >> Not an ARM expert, but from what I read, SME builds on top of SVE, so I >> would guess that having SME implies having SVE. > > No, it does not imply it. SVE plus SME is a very common config, > but the Apple M4 chip has SME without SVE. Ok, I see. Wiki says [1]: It is Apple's first SoC to reportedly use the ARMv9 CPU architecture. The M4 is based on ARMv9.2a. It supports the Scalable Matrix Extension (SME) but not the Scalable Vector Extension (SVE). Because of the lack of SVE support, the LLVM compiler officially flags the M4 as supporting ARMv8.7a. And the Phoronix article it references says: So seeing the Apple-contributed compiler support for LLVM adding the M4 as an "ARMv8.7" based design was coming as a surprise. But in digging through the patch there is this code comment that explains the situation: "Technically apple-m4 is ARMv9.2a, but a quirk of LLVM defines v9.0 as requiring SVE, which is optional according to the Arm ARM and not supported by the core. ARMv8.7a is the next closest choice." So yeah, I guess that this use case was not expected when the aarch64-tdep.c code was written. Simon [1] https://en.wikipedia.org/wiki/Apple_M4 [2] https://www.phoronix.com/news/Apple-M4-Added-To-LLVM-Clang