Re: gdb support for SME-without-SVE ?

On Tue, Jan 27, 2026, 11:32 Peter Maydell <[email protected]> wrote:

> Hi: is GDB for Arm intended to support configurations where the target
> CPU has SME but not SVE?
>

Technically yes, but I haven't exercised that scenario that much. I'd
assume it broken.

At the time the prospect was to have both SVE and SME. But that changed a
bit over time and nobody enabled that in gdb.


> We're just implementing support for that in QEMU for using SME
> with the hvf hypervisor accelerator on macos systems, but when
> we tried connecting gdb to QEMU gdb crashed:
>
>   (gdb) target remote localhost:1234
>   Remote debugging using localhost:1234
>   ../../gdb/aarch64-tdep.c:3068: internal-error:
> aarch64_pseudo_register_type: bad register number 160
>   A problem internal to GDB has been detected,
>   further debugging may prove unreliable.
>   Fatal signal: Abort trap: 6
>
>
> https://lore.kernel.org/qemu-devel/CAAjaMXZLG2aBtStRhyvmdENj1Z+Mx05BmDgyYUoYrc_ZnHwyVQ@mail.gmail.com/
>
> Is this a known missing feature in GDB, or is it a config that's
> supposed to work but we've got the XML register description wrong
> somehow?
>

I'd say missing. And apparently gdb is not well guarded against it.


> It looks from the aarch64-tdep.c code like perhaps GDB assumes
> that the Vn vector registers only exist with SVE, but they also
> exist in SME-only CPUs.
>
> thanks
> -- PMM
>