Re: [PATCH 1/1] gdb, gdbserver: Add Intel APX register support
Keith Seitz <[email protected]>
| Newsgroups | gmane.comp.gdb.patches |
|---|---|
| Message-ID | <[email protected]> |
Hi, On 7/25/26 3:53 AM, Christina Joos wrote: > From: "H.J. Lu" <[email protected]> > > Intel Advanced Performance Extensions (APX) doubles the number of > general-purpose registers (GPRs) from 16 to 32 (r16-r31). Thank you for pursuing this. I'm not going to claim that I completely understand the nuiance of modern x86_64 features, but generally, the code seems okay to me. > Those new 64-bit Extended GPRs (EGPRs) do not change the size of the > XSAVE area, as they take up the space left behind by the deprecated > MPX registers. > > In contrast to the legacy GPRS, EGPRs are not enabled by default in 64-bit > mode but are xcr0 enabled based on APX_F Intel APX state. Define > X86_XSTATE_APX_F to support this new configuration. > > Add gdb and gdbserver registers support for those new 64-bit EGPRs. > Also add byte, word and dword pseudo register support. I appreciate the simplified approach in this revision, removing the previously proposed maint commands. Generating core files is much better/safe approach. One trivial nit (no need to repost): I previously asked whether apx_offset should be set independently of PKRU/AVX512 in i387_guess_xsave_layout()[1]. You explained that APX is only expected with PKRU or AVX512 on known Intel CPUs addresses[2]. A brief comment documenting that assumption would be helpful for future readers. 'Cause, as expected, I forgot all about that discussion already! :-p Reviewed-By: Keith Seitz <[email protected]> Keith [1] https://sourceware.org/pipermail/gdb-patches/2026-June/228135.html [2] https://sourceware.org/pipermail/gdb-patches/2026-July/228491.html