[binutils-gdb] aarch64: Remove +mpamv2 feature option

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=2c9e52009d31b8fe8ee58dff663acdbda7fe2dfc

commit 2c9e52009d31b8fe8ee58dff663acdbda7fe2dfc
Author: Richard Earnshaw <[email protected]>
Date:   Mon Jun 29 16:46:27 2026 +0100

    aarch64: Remove +mpamv2 feature option
    
    The remaining mpamv2 details only use system registers; so by our
    conventions we do not use a feature option to enable them.  Remove the
    now redundant +mpamv2 architecture option and adjust the tests
    accordingly.

Diff:
---
 gas/config/tc-aarch64.c                       | 1 -
 gas/doc/c-aarch64.texi                        | 2 --
 gas/testsuite/gas/aarch64/sysreg/mpamv2-bad.d | 2 +-
 gas/testsuite/gas/aarch64/sysreg/mpamv2.d     | 2 +-
 include/opcode/aarch64.h                      | 2 --
 opcodes/aarch64-sys-regs.def                  | 8 ++++----
 6 files changed, 6 insertions(+), 11 deletions(-)

diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index ae59edcdce9..715df4de4bf 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -11138,7 +11138,6 @@ static const struct aarch64_option_cpu_value_table aarch64_features[] = {
   {"f16f32mm",		AARCH64_FEATURE (F16F32MM), AARCH64_FEATURES (2, SIMD, F16)},
   {"f16mm",		AARCH64_FEATURE (F16MM), AARCH64_FEATURES (2, SIMD, F16)},
   {"sve-b16mm",		AARCH64_FEATURE (SVE_B16MM), AARCH64_FEATURE (SVE)},
-  {"mpamv2",		AARCH64_FEATURE (MPAMv2), AARCH64_NO_FEATURES},
   {"mtetc",		AARCH64_FEATURE (MTETC), AARCH64_FEATURE (MEMTAG)},
   {"tlbid",		AARCH64_FEATURE (TLBID), AARCH64_NO_FEATURES},
   {NULL,		AARCH64_NO_FEATURES, AARCH64_NO_FEATURES},
diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi
index 0620ad8f4d2..4ac0ae6dae1 100644
--- a/gas/doc/c-aarch64.texi
+++ b/gas/doc/c-aarch64.texi
@@ -268,8 +268,6 @@ automatically cause those extensions to be disabled.
  @tab Enable Armv8.8-A memcpy and memset acceleration instructions.
 @item @code{mops-go} @tab @code{mops}, @code{memtag}
  @tab Enable tag only variants of MOPS instructions.
-@item @code{mpamv2} @tab
- @tab Enable MPAMv2 system registers.
 @item @code{mtetc} @tab @code{memtag}
  @tab Enable Data cache tag block operations.
 @item @code{occmo} @tab
diff --git a/gas/testsuite/gas/aarch64/sysreg/mpamv2-bad.d b/gas/testsuite/gas/aarch64/sysreg/mpamv2-bad.d
index af47db767c9..8490318937b 100644
--- a/gas/testsuite/gas/aarch64/sysreg/mpamv2-bad.d
+++ b/gas/testsuite/gas/aarch64/sysreg/mpamv2-bad.d
@@ -1,3 +1,3 @@
-#as: -march=armv9.4-a -menable-sysreg-checking -I$srcdir/$subdir
+#as: -march=armv9.3-a -menable-sysreg-checking -I$srcdir/$subdir
 #source: mpamv2.s
 #error_output: mpamv2-bad.l
diff --git a/gas/testsuite/gas/aarch64/sysreg/mpamv2.d b/gas/testsuite/gas/aarch64/sysreg/mpamv2.d
index 159f6a3ec61..270e3c20848 100644
--- a/gas/testsuite/gas/aarch64/sysreg/mpamv2.d
+++ b/gas/testsuite/gas/aarch64/sysreg/mpamv2.d
@@ -1,4 +1,4 @@
-#as: -menable-sysreg-checking -march=armv8-a+mpamv2 -I$srcdir/$subdir
+#as: -menable-sysreg-checking -march=armv9.4-a -I$srcdir/$subdir
 #objdump: -dr
 
 .*:     file format .*
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index ea5c507d06e..9851f4ad248 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -284,8 +284,6 @@ enum aarch64_feature_bit {
   AARCH64_FEATURE_POE2,
   /* TEV instructions.  */
   AARCH64_FEATURE_TEV,
-  /* MPAMv2.  */
-  AARCH64_FEATURE_MPAMv2,
   /* MTETC.  */
   AARCH64_FEATURE_MTETC,
   /* TLBI Domains.  */
diff --git a/opcodes/aarch64-sys-regs.def b/opcodes/aarch64-sys-regs.def
index 6f9f2b4c0a8..1efbc3f3de5 100644
--- a/opcodes/aarch64-sys-regs.def
+++ b/opcodes/aarch64-sys-regs.def
@@ -922,10 +922,10 @@
   SYSREG ("mpambwcap_el2",	CPENC (3,4,10,5,6),	0,		AARCH64_FEATURE (V9_3A)) /* MPAM_PE_BW_CTRL */
   SYSREG ("mpambwidr_el1",	CPENC (3,0,10,4,5),	F_REG_READ,	AARCH64_FEATURE (V9_3A)) /* MPAM_PE_BW_CTRL */
   SYSREG ("mpambwsm_el1",	CPENC (3,0,10,5,7),	0,		AARCH64_FEATURES (2, SME, V9_3A)) /* SME && MPAM_PE_BW_CTRL */
-  SYSREG ("mpamctl_el1",	CPENC (3,0,10,5,2),	0,		AARCH64_FEATURE (MPAMv2))
-  SYSREG ("mpamctl_el12",	CPENC (3,5,10,5,2),	0,		AARCH64_FEATURE (MPAMv2))
-  SYSREG ("mpamctl_el2",	CPENC (3,4,10,5,2),	0,		AARCH64_FEATURE (MPAMv2))
-  SYSREG ("mpamctl_el3",	CPENC (3,6,10,5,2),	0,		AARCH64_FEATURE (MPAMv2))
+  SYSREG ("mpamctl_el1",	CPENC (3,0,10,5,2),	0,		AARCH64_FEATURE (V9_3A)) /* MPAMv2 */
+  SYSREG ("mpamctl_el12",	CPENC (3,5,10,5,2),	0,		AARCH64_FEATURE (V9_3A)) /* MPAMv2 */
+  SYSREG ("mpamctl_el2",	CPENC (3,4,10,5,2),	0,		AARCH64_FEATURE (V9_3A)) /* MPAMv2 */
+  SYSREG ("mpamctl_el3",	CPENC (3,6,10,5,2),	0,		AARCH64_FEATURE (V9_3A)) /* MPAMv2 */
   SYSREG ("mpamhcr_el2",	CPENC (3,4,10,4,0),	0,		AARCH64_FEATURE (V8_2A)) /* MPAM */
   SYSREG ("mpamidr_el1",	CPENC (3,0,10,4,4),	F_REG_READ,	AARCH64_FEATURE (V8_2A)) /* MPAM */
   SYSREG ("mpamsm_el1",		CPENC (3,0,10,5,3),	0,		AARCH64_FEATURES (2, SME, V8_2A)) /* SME && MPAM */