Re: [PATCH v3] RISC-V: Fix build with GCC-8
"Maciej W. Rozycki" <[email protected]>
| Newsgroups | gmane.comp.gnu.binutils |
|---|---|
| Message-ID | <[email protected]> |
On Fri, 26 Jun 2026, Jan Beulich wrote:
> > --- a/opcodes/riscv-dis.c
> > +++ b/opcodes/riscv-dis.c
> > @@ -924,14 +924,18 @@ print_insn_args (const char *oparg, insn_t l, bfd_vma pc, disassemble_info *info
> > switch (*++oparg)
> > {
> > case 'd':
> > - unsigned vd = EXTRACT_OPERAND (SPACEMIT_IME_VD, l) * 2;
> > - print (info->stream, dis_style_register, "%s",
> > - riscv_vecr_names_numeric[vd]);
> > + {
> > + unsigned vd = EXTRACT_OPERAND (SPACEMIT_IME_VD, l) * 2;
> > + print (info->stream, dis_style_register, "%s",
> > + riscv_vecr_names_numeric[vd]);
> > + }
> > break;
> > case 's':
> > - unsigned vs = EXTRACT_OPERAND (SPACEMIT_IME_VS1, l) * 2;
> > - print (info->stream, dis_style_register, "%s",
> > - riscv_vecr_names_numeric[vs]);
> > + {
> > + unsigned vs = EXTRACT_OPERAND (SPACEMIT_IME_VS1, l) * 2;
> > + print (info->stream, dis_style_register, "%s",
> > + riscv_vecr_names_numeric[vs]);
> > + }
> > break;
>
> ... you do here. Once again, I'm happy to adjust while committing, just that
> first we need to understand and address the gcc10 issue. Maciej, please
> provide details.
The original report has them.
Maciej