Re: [PATCH v1 1/2] Support AVX10_V2_AUX instructions

Jan Beulich <[email protected]>
Newsgroups gmane.comp.gnu.binutils
Message-ID <[email protected]>
On 27.06.2026 11:55, Ganesh Gopalasubramanian wrote:
> --- a/opcodes/i386-opc.tbl
> +++ b/opcodes/i386-opc.tbl
> @@ -3620,6 +3620,95 @@ vucomxs<sdh>, 0x<sdh:spfx>2e, AVX10_2, Modrm|EVexLIG|<sdh:spc1>|<sdh:vexw>|Disp8
>  
>  // AVX10.2 instructions end.
>  
> +// AVX10_V2_AUX instructions.
> +
> +// VCVTPS2BF8, VCVTPS2BF8S, VCVTPS2HF8, VCVTPS2HF8S - narrowing 2-op (F3.MAP5)
> +// VCVTROPS2HF8, VCVTROPS2HF8S - narrowing 2-op (66.MAP5)
> +
> +<cvtps8:opc:pfx, +
> +    bf8:39:f3, +
> +    bf8s:3b:f3, +
> +    hf8:38:f3, +
> +    hf8s:3a:f3>
> +
> +vcvtps2<cvtps8>, 0x<cvtps8:pfx><cvtps8:opc>, AVX10_V2_AUX, Modrm|Map5|EVex128|VexW0|Masking|Broadcast|Disp8MemShift=4|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM }
> +vcvtps2<cvtps8>, 0x<cvtps8:pfx><cvtps8:opc>, AVX10_V2_AUX, Modrm|Map5|EVex256|VexW0|Masking|Broadcast|Disp8MemShift=5|NoSuf, { RegYMM|Dword|Unspecified|BaseIndex, RegXMM }
> +vcvtps2<cvtps8>, 0x<cvtps8:pfx><cvtps8:opc>, AVX10_V2_AUX, Modrm|Map5|EVex512|VexW0|Masking|Broadcast|Disp8MemShift=6|NoSuf, { RegZMM|Dword|Unspecified|BaseIndex, RegXMM }

To extend what Haochen has said, please go look at pre-existing templates (preferably
ones added more recently, as older ones may have legacy quirks) to see how patterns
like this want handling.

> +// VCVTBF82BF6S (F3.MAP5.W1) - reg-reg only, no mask
> +vcvtbf82bf6s, 0xf33e, AVX10_V2_AUX, Modrm|Map5|EVex128|VexW1|NoSuf, { RegXMM, RegXMM }
> +vcvtbf82bf6s, 0xf33e, AVX10_V2_AUX, Modrm|Map5|EVex256|VexW1|NoSuf, { RegYMM, RegYMM }
> +vcvtbf82bf6s, 0xf33e, AVX10_V2_AUX, Modrm|Map5|EVex512|VexW1|NoSuf, { RegZMM, RegZMM }

These and ...

> +// VCVTHF82HF6S (F3.MAP5.W0) - reg-reg only, no mask
> +vcvthf82hf6s, 0xf33c, AVX10_V2_AUX, Modrm|Map5|EVex128|VexW0|NoSuf, { RegXMM, RegXMM }
> +vcvthf82hf6s, 0xf33c, AVX10_V2_AUX, Modrm|Map5|EVex256|VexW0|NoSuf, { RegYMM, RegYMM }
> +vcvthf82hf6s, 0xf33c, AVX10_V2_AUX, Modrm|Map5|EVex512|VexW0|NoSuf, { RegZMM, RegZMM }

... these want folding into one (each). Just like you have it ...

> +// VUNPACKB (NP.0F3A.W0) - with imm8
> +vunpackb, 0x3d, AVX10_V2_AUX, Modrm|Masking|Space0F3A|VexW0|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8, RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
... here.

Jan
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