Re: [PATCH 1/2] x86: optimize XCHG to MOV for same-register forms

On 02.07.2026 15:16, Michael Matz wrote:
> Hello,
> 
> On Thu, 2 Jul 2026, Mark Wielaard wrote:
> 
>>    This instruction decoder can decode three special instructions     
>>    which mean nothing natively (are no-ops as far as regs/mem are     
>>    concerned) but have meaning for supporting Valgrind.  A special    
>>    instruction is flagged by the 16-byte preamble 48C1C703 48C1C70D   
>>    48C1C73D 48C1C733 (in the standard interpretation, that means: rolq
>>    $3, %rdi; rolq $13, %rdi; rolq $61, %rdi; rolq $51, %rdi).         
>>    Following that, one of the following 3 are allowed (standard       
>>    interpretation in parentheses):                                    
>>                                                                                 
>>       4887DB (xchgq %rbx,%rbx)   %RDX = client_request ( %RAX )       
>>       4887C9 (xchgq %rcx,%rcx)   %RAX = guest_NRADDR                  
>>       4887D2 (xchgq %rdx,%rdx)   call-noredir *%RAX                   
>>       4887F6 (xchgq %rdi,%rdi)   IR injection                         
> 
> So, a future version of the header should use .byte instead of menmonics.  

Or .insn, when available.

Jan