Re: [PATCH] x86: separate AVX10.1-aux from AVX10.2

On 13.07.2026 04:20, Jiang, Haochen wrote:
>> From: Jan Beulich <[email protected]>
>> Sent: Friday, July 10, 2026 8:23 PM
>>
>> --- a/gas/config/tc-i386.c
>> +++ b/gas/config/tc-i386.c
>> @@ -1247,13 +1247,14 @@ static const arch_entry cpu_arch[] =
>>    VECARCH (sm4, SM4, ANY_SM4, reset),
>>    SUBARCH (pbndkb, PBNDKB, PBNDKB, false),
>>    VECARCH (avx10.1, AVX10_1, ANY_AVX512F, set),
>> +  VECARCH (avx10.1aux, AVX10_1_AUX, ANY_AVX10_1_AUX, set),
> 
> Maybe avx10_v1_aux instead of avx10.1aux to align with documentation?

I was wondering, but imo the existing "avx10.1" makes it pretty clear cut.
I would have wanted to make it "avx10.1-aux", but dashes aren't okay to use
here, and "avx10.1_aux" feels somewhat odd.

>> --- a/opcodes/i386-opc.h
>> +++ b/opcodes/i386-opc.h
>> @@ -209,6 +209,8 @@ enum i386_cpu
>>    CpuAVX512_VP2INTERSECT,
>>    /* AMD AVX-512 BMM Instructions support required.  */
>>    CpuAVX512_BMM,
>> +  /* Intel AVX10.1-aux Instructions support required.  */
> 
> For those joint ISAs, we might need to use x86 in the future
> instead of Intel/AMD.

And again - indeed I was wondering. Yet right now AVX10 (up to 10.2) is
still very much an Intel-only spec. 10.2-aux is the odd one for the time
being. That said, I'm certainly okay to omit "Intel" here right away.

Jan