[PATCH 1/2] x86: correct implied-AVX512VL checking

Templates specifying e.g. AVX2|AVX512F (i.e. providing all of AVX2,
AVX512F, and AVX512VL form(s) at the same time) would presently bypass the
operand size checking in check_VecOperands(). Both t->cpu and t->cpu_any
need taking into account.

--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -8793,9 +8793,11 @@ check_VecOperands (const insn_template *
      operand size is YMMword or XMMword.  Since this function runs after
      template matching, there's no need to check for YMMword/XMMword in
      the template.  */
-  cpu = cpu_flags_and (cpu_flags_from_attr (t->cpu), avx512);
+  cpu = cpu_flags_or (cpu_flags_from_attr (t->cpu),
+		      cpu_flags_from_attr (t->cpu_any));
+  cpu = cpu_flags_and (cpu, avx512);
   if (!cpu_flags_all_zero (&cpu)
-      && !is_cpu (t, CpuAVX512VL)
+      && !cpu.bitfield.cpuavx512vl
       && !cpu_arch_flags.bitfield.cpuavx512vl
       && (!t->opcode_modifier.vex || need_evex_encoding (t)))
     {
--- a/gas/testsuite/gas/i386/avx512vl-plain.l
+++ b/gas/testsuite/gas/i386/avx512vl-plain.l
@@ -2,6 +2,7 @@
 .*:5: Error: .*
 .*:6: Error: .*
 .*:7: Error: .*
+.*:20: Error: .*
 GAS LISTING .*
 
 
@@ -24,5 +25,9 @@ GAS LISTING .*
 [ 	]*15[ 	]+\.arch \.vpclmulqdq
 [ 	]*16[ 	]+\?\?\?\? 62F36D28[ 	]+\{evex\} vpclmulqdq[ 	]+\$0, %ymm1, %ymm2, %ymm3
 [ 	]*16[ 	]+44D900
-[ 	]*17[ 	]+\?\?\?\? 00000000 		\.p2align 4,0
-#...
+[ 	]*17[ 	]*
+[ 	]*18[ 	]+\.arch generic32
+[ 	]*19[ 	]+\.arch \.avx512f
+[ 	]*20[ 	]+\{evex\}[ 	]+vpermd[ 	]+%ymm1, %ymm2, %ymm3
+[ 	]*21[ 	]+\?\?\?\? C4E26D36[ 	]+vpermd[ 	]+%ymm1, %ymm2, %ymm3
+#pass
--- a/gas/testsuite/gas/i386/avx512vl-plain.s
+++ b/gas/testsuite/gas/i386/avx512vl-plain.s
@@ -14,4 +14,8 @@ _start:
 
 	.arch .vpclmulqdq
 	{evex} vpclmulqdq	$0, %ymm1, %ymm2, %ymm3
-	.p2align 4,0
+
+	.arch generic32
+	.arch .avx512f
+	{evex}	vpermd		%ymm1, %ymm2, %ymm3
+		vpermd		%ymm1, %ymm2, %ymm3