Re: [PATCH v3 02/13] RISC-V: EEW64 checking

On 21.07.2026 03:30, Nelson Chu wrote:
> On Fri, Jun 19, 2026 at 7:47 PM Jan Beulich <[email protected]> wrote:
>>
>> Like the assembler, the disassembler should also use the INSN_V_EEW64
>> flag. Respectively marked insns shouldn't be disassembled normally when
>> Zve64x isn't enabled.
>>
>> While there also drop the redundant Zve32x check from gas: All affected
>> insns are INSN_CLASS_V, which means Zve32x was already checked to be
>> enabled (both V and Zve64x imply Zve32x).
> 
> make sense.
> 
>> Question is why a flag was used in the first place: The property could be
>> expressed by a new INSN_CLASS_ZVE64X, couldn't it?
> 
> I forgot, probably just because people argued they want to
> dis-assembler old objects for segment load/store with EEW64 but
> without zve64x since this check may be added later that, but it
> doesn't matter now.  I think using a new INSN_CLASS_ZVE64X should be
> the right way to go.

Okay, I'll make a follow-on patch then.

Jan