Re: [Valgrind-developers] [PATCH 1/2] x86: optimize XCHG to MOV for same-register forms

> late 486 DX/2 stepping 5 which even has CPUID and
> VME extensions (no 4MiB pages though; these landed
> with stepping 6 only)

Can you please capture a short CPUID dump?  :)

I got 480h (DX4) and 490h (DX4WB) dumps where PSE
is a difference as well. And a 435h dump (no PSE)... but
a 436h with PSE is a new one for me. See here:

  https://www.sandpile.org/x86/cpuid.htm (search 'PSE')

> each and every ROR instruction did set OF according
> to the result of the operation, even for the cases undefined

Alas undefined OF for ROL/ROR >1 has seen numerous
different implementations/behaviors. See here:

    https://www.sandpile.org/x86/flags.htm

--
C.