[PATCH v3] Support AVX10_V2_AUX instructions
Rohan Shenoy <[email protected]>
| Newsgroups | gmane.comp.gnu.binutils |
|---|---|
| Message-ID | <[email protected]> |
Add assembler and disassembler support for AVX10_V2_AUX instructions. AVX10_V2_AUX is independent from AVX10_V1_AUX. It requires AVX10, and is named avx10v2aux. Reference: AI Compute Extensions (ACE) Specification, v1.15 https://x86ecosystem.org/wp-content/uploads/2026/06/ACE_v1_Specification_public_1_15.pdf Co-authored-by: Ganesh Gopalasubramanian <[email protected]> Co-authored-by: Umesh Kalvakuntla <[email protected]> --- Notes: - AVX10_V2_AUX requires AVX10 only, and has no dependence on AVX10_1_AUX (both are independent bits/features). - Generated opcode tables are omitted. - Changes in V3 since V2: - Rebased on top of avx10v1aux naming patch. - Addressed comments by Jan. - Changes in V2 since V1: - Addressed comments by Jan and Haochen. - Added Intel-syntax tests. gas/NEWS | 2 + gas/config/tc-i386.c | 1 + gas/doc/c-i386.texi | 3 +- .../gas/i386/x86-64-avx10_v2_aux-intel.d | 188 ++++++++++++++++ gas/testsuite/gas/i386/x86-64-avx10_v2_aux.d | 187 ++++++++++++++++ gas/testsuite/gas/i386/x86-64-avx10_v2_aux.s | 210 ++++++++++++++++++ gas/testsuite/gas/i386/x86-64.exp | 2 + opcodes/i386-dis-evex-prefix.h | 52 +++++ opcodes/i386-dis-evex-w.h | 37 +++ opcodes/i386-dis-evex.h | 22 +- opcodes/i386-dis.c | 25 +++ opcodes/i386-gen.c | 3 + opcodes/i386-opc.h | 3 + opcodes/i386-opc.tbl | 46 ++++ 14 files changed, 769 insertions(+), 12 deletions(-) create mode 100644 gas/testsuite/gas/i386/x86-64-avx10_v2_aux-intel.d create mode 100644 gas/testsuite/gas/i386/x86-64-avx10_v2_aux.d create mode 100644 gas/testsuite/gas/i386/x86-64-avx10_v2_aux.s diff --git a/gas/NEWS b/gas/NEWS index 70cfbf41a7a..8b07d86daa3 100644 --- a/gas/NEWS +++ b/gas/NEWS @@ -1,5 +1,7 @@ -*- text -*- +* Add support for the x86 AVX10_V2_AUX instructions. + * The avr target supports .gnu_attribute 4 (Tag_GNU_AVR_VTABLE_AS). For details, see https://sourceware.org/PR34305 diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 1f93f7f3dc6..be9ad1dc2eb 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -1256,6 +1256,7 @@ static const arch_entry cpu_arch[] = VECARCH (avx10.1aux, AVX10_1_AUX, ANY_AVX10_1_AUX, set), VECARCH (avx10v1aux, AVX10_1_AUX, ANY_AVX10_1_AUX, set), VECARCH (avx10.2, AVX10_2, ANY_AVX10_2, set), + VECARCH (avx10v2aux, AVX10_V2_AUX, ANY_AVX10_V2_AUX, set), SUBARCH (user_msr, USER_MSR, USER_MSR, false), SUBARCH (apx_f, APX_F, ANY_APX_F, false), SUBARCH (apx_nci, APX_NCI, ANY_APX_NCI, false), diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi index a455c9cc86f..dbc905a33ef 100644 --- a/gas/doc/c-i386.texi +++ b/gas/doc/c-i386.texi @@ -233,6 +233,7 @@ accept various extension mnemonics. For example, @code{avx10.2/512}, @code{avx10.2/256}, @code{avx10.2/128}, +@code{avx10v2aux}, @code{movrs}, @code{amx_int8}, @code{amx_bf16}, @@ -1721,7 +1722,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are: @item @samp{.avx512_bitalg} @tab @samp{.avx512_bf16} @tab @samp{.avx512_vp2intersect} @item @samp{.tdx} @tab @samp{.avx_vnni} @tab @samp{.avx512_fp16} @tab @samp{avx512_bmm} @item @samp{.avx10.1} @tab @samp{.avx10.1aux} @tab @samp{.avx10v1aux} @tab @samp{.avx10.2} -@item @samp{.clwb} +@item @samp{.avx10v2aux} @tab @samp{.clwb} @item @samp{.rdpid} @tab @samp{.ptwrite} @tab @samp{.ibt} @tab @samp{.prefetchi} @item @samp{.cmpccxadd} @tab @samp{.wrmsrns} @tab @samp{.msrlist} @tab @samp{.se1} @item @samp{.avx_ne_convert} @tab @samp{.rao_int} @tab @samp{.fred} @tab @samp{.lkgs} diff --git a/gas/testsuite/gas/i386/x86-64-avx10_v2_aux-intel.d b/gas/testsuite/gas/i386/x86-64-avx10_v2_aux-intel.d new file mode 100644 index 00000000000..041fcd8a99c --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx10_v2_aux-intel.d @@ -0,0 +1,188 @@ +#objdump: -dw -Mintel +#name: x86-64 AVX10 V2 AUX (Intel disassembly) +#source: x86-64-avx10_v2_aux.s + +.*: +file format .* + +Disassembly of section \.text: + +#... +[a-f0-9]+ <_intel>: +[ ]*[a-f0-9]+:[ ]*62 f5 7e 08 39 c1[ ]+vcvtps2bf8[ ]+xmm0,xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 28 39 c1[ ]+vcvtps2bf8[ ]+xmm0,ymm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 48 39 c1[ ]+vcvtps2bf8[ ]+xmm0,zmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 08 39 41 7f[ ]+vcvtps2bf8[ ]+xmm0,XMMWORD PTR \[rcx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 f5 7e 28 39 41 7f[ ]+vcvtps2bf8[ ]+xmm0,YMMWORD PTR \[rcx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f5 7e 48 39 41 7f[ ]+vcvtps2bf8[ ]+xmm0,ZMMWORD PTR \[rcx\+0x1fc0\] +[ ]*[a-f0-9]+:[ ]*62 d5 7e 18 39 01[ ]+vcvtps2bf8[ ]+xmm0,DWORD BCST \[r9\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 d5 7e 38 39 01[ ]+vcvtps2bf8[ ]+xmm0,DWORD BCST \[r9\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 d5 7e 58 39 01[ ]+vcvtps2bf8[ ]+xmm0,DWORD BCST \[r9\]\{1to16\} +[ ]*[a-f0-9]+:[ ]*62 f5 7e 09 39 c1[ ]+vcvtps2bf8[ ]+xmm0\{k1\},xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 89 39 c1[ ]+vcvtps2bf8[ ]+xmm0\{k1\}\{z\},xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 74 08 39 c2[ ]+vcvtbiasps2bf8[ ]+xmm0,xmm1,xmm2 +[ ]*[a-f0-9]+:[ ]*62 f5 74 28 39 c2[ ]+vcvtbiasps2bf8[ ]+xmm0,ymm1,ymm2 +[ ]*[a-f0-9]+:[ ]*62 f5 74 48 39 c2[ ]+vcvtbiasps2bf8[ ]+xmm0,zmm1,zmm2 +[ ]*[a-f0-9]+:[ ]*62 f5 74 08 39 41 7f[ ]+vcvtbiasps2bf8[ ]+xmm0,xmm1,XMMWORD PTR \[rcx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 f5 74 28 39 41 7f[ ]+vcvtbiasps2bf8[ ]+xmm0,ymm1,YMMWORD PTR \[rcx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f5 74 48 39 41 7f[ ]+vcvtbiasps2bf8[ ]+xmm0,zmm1,ZMMWORD PTR \[rcx\+0x1fc0\] +[ ]*[a-f0-9]+:[ ]*62 d5 74 18 39 01[ ]+vcvtbiasps2bf8[ ]+xmm0,xmm1,DWORD BCST \[r9\] +[ ]*[a-f0-9]+:[ ]*62 d5 74 38 39 01[ ]+vcvtbiasps2bf8[ ]+xmm0,ymm1,DWORD BCST \[r9\] +[ ]*[a-f0-9]+:[ ]*62 d5 74 58 39 01[ ]+vcvtbiasps2bf8[ ]+xmm0,zmm1,DWORD BCST \[r9\] +[ ]*[a-f0-9]+:[ ]*62 f5 74 09 39 c2[ ]+vcvtbiasps2bf8[ ]+xmm0\{k1\},xmm1,xmm2 +[ ]*[a-f0-9]+:[ ]*62 f5 74 89 39 c2[ ]+vcvtbiasps2bf8[ ]+xmm0\{k1\}\{z\},xmm1,xmm2 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 08 3b c1[ ]+vcvtps2bf8s[ ]+xmm0,xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 28 3b c1[ ]+vcvtps2bf8s[ ]+xmm0,ymm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 48 3b c1[ ]+vcvtps2bf8s[ ]+xmm0,zmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 08 3b 41 7f[ ]+vcvtps2bf8s[ ]+xmm0,XMMWORD PTR \[rcx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 f5 7e 28 3b 41 7f[ ]+vcvtps2bf8s[ ]+xmm0,YMMWORD PTR \[rcx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f5 7e 48 3b 41 7f[ ]+vcvtps2bf8s[ ]+xmm0,ZMMWORD PTR \[rcx\+0x1fc0\] +[ ]*[a-f0-9]+:[ ]*62 d5 7e 18 3b 01[ ]+vcvtps2bf8s[ ]+xmm0,DWORD BCST \[r9\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 d5 7e 38 3b 01[ ]+vcvtps2bf8s[ ]+xmm0,DWORD BCST \[r9\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 d5 7e 58 3b 01[ ]+vcvtps2bf8s[ ]+xmm0,DWORD BCST \[r9\]\{1to16\} +[ ]*[a-f0-9]+:[ ]*62 f5 7e 09 3b c1[ ]+vcvtps2bf8s[ ]+xmm0\{k1\},xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 89 3b c1[ ]+vcvtps2bf8s[ ]+xmm0\{k1\}\{z\},xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 74 08 3b c2[ ]+vcvtbiasps2bf8s[ ]+xmm0,xmm1,xmm2 +[ ]*[a-f0-9]+:[ ]*62 f5 74 28 3b c2[ ]+vcvtbiasps2bf8s[ ]+xmm0,ymm1,ymm2 +[ ]*[a-f0-9]+:[ ]*62 f5 74 48 3b c2[ ]+vcvtbiasps2bf8s[ ]+xmm0,zmm1,zmm2 +[ ]*[a-f0-9]+:[ ]*62 f5 74 08 3b 41 7f[ ]+vcvtbiasps2bf8s[ ]+xmm0,xmm1,XMMWORD PTR \[rcx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 f5 74 28 3b 41 7f[ ]+vcvtbiasps2bf8s[ ]+xmm0,ymm1,YMMWORD PTR \[rcx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f5 74 48 3b 41 7f[ ]+vcvtbiasps2bf8s[ ]+xmm0,zmm1,ZMMWORD PTR \[rcx\+0x1fc0\] +[ ]*[a-f0-9]+:[ ]*62 d5 74 18 3b 01[ ]+vcvtbiasps2bf8s[ ]+xmm0,xmm1,DWORD BCST \[r9\] +[ ]*[a-f0-9]+:[ ]*62 d5 74 38 3b 01[ ]+vcvtbiasps2bf8s[ ]+xmm0,ymm1,DWORD BCST \[r9\] +[ ]*[a-f0-9]+:[ ]*62 d5 74 58 3b 01[ ]+vcvtbiasps2bf8s[ ]+xmm0,zmm1,DWORD BCST \[r9\] +[ ]*[a-f0-9]+:[ ]*62 f5 74 09 3b c2[ ]+vcvtbiasps2bf8s[ ]+xmm0\{k1\},xmm1,xmm2 +[ ]*[a-f0-9]+:[ ]*62 f5 74 89 3b c2[ ]+vcvtbiasps2bf8s[ ]+xmm0\{k1\}\{z\},xmm1,xmm2 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 08 38 c1[ ]+vcvtps2hf8[ ]+xmm0,xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 28 38 c1[ ]+vcvtps2hf8[ ]+xmm0,ymm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 48 38 c1[ ]+vcvtps2hf8[ ]+xmm0,zmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 08 38 41 7f[ ]+vcvtps2hf8[ ]+xmm0,XMMWORD PTR \[rcx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 f5 7e 28 38 41 7f[ ]+vcvtps2hf8[ ]+xmm0,YMMWORD PTR \[rcx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f5 7e 48 38 41 7f[ ]+vcvtps2hf8[ ]+xmm0,ZMMWORD PTR \[rcx\+0x1fc0\] +[ ]*[a-f0-9]+:[ ]*62 d5 7e 18 38 01[ ]+vcvtps2hf8[ ]+xmm0,DWORD BCST \[r9\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 d5 7e 38 38 01[ ]+vcvtps2hf8[ ]+xmm0,DWORD BCST \[r9\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 d5 7e 58 38 01[ ]+vcvtps2hf8[ ]+xmm0,DWORD BCST \[r9\]\{1to16\} +[ ]*[a-f0-9]+:[ ]*62 f5 7e 09 38 c1[ ]+vcvtps2hf8[ ]+xmm0\{k1\},xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 89 38 c1[ ]+vcvtps2hf8[ ]+xmm0\{k1\}\{z\},xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 74 08 38 c2[ ]+vcvtbiasps2hf8[ ]+xmm0,xmm1,xmm2 +[ ]*[a-f0-9]+:[ ]*62 f5 74 28 38 c2[ ]+vcvtbiasps2hf8[ ]+xmm0,ymm1,ymm2 +[ ]*[a-f0-9]+:[ ]*62 f5 74 48 38 c2[ ]+vcvtbiasps2hf8[ ]+xmm0,zmm1,zmm2 +[ ]*[a-f0-9]+:[ ]*62 f5 74 08 38 41 7f[ ]+vcvtbiasps2hf8[ ]+xmm0,xmm1,XMMWORD PTR \[rcx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 f5 74 28 38 41 7f[ ]+vcvtbiasps2hf8[ ]+xmm0,ymm1,YMMWORD PTR \[rcx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f5 74 48 38 41 7f[ ]+vcvtbiasps2hf8[ ]+xmm0,zmm1,ZMMWORD PTR \[rcx\+0x1fc0\] +[ ]*[a-f0-9]+:[ ]*62 d5 74 18 38 01[ ]+vcvtbiasps2hf8[ ]+xmm0,xmm1,DWORD BCST \[r9\] +[ ]*[a-f0-9]+:[ ]*62 d5 74 38 38 01[ ]+vcvtbiasps2hf8[ ]+xmm0,ymm1,DWORD BCST \[r9\] +[ ]*[a-f0-9]+:[ ]*62 d5 74 58 38 01[ ]+vcvtbiasps2hf8[ ]+xmm0,zmm1,DWORD BCST \[r9\] +[ ]*[a-f0-9]+:[ ]*62 f5 74 09 38 c2[ ]+vcvtbiasps2hf8[ ]+xmm0\{k1\},xmm1,xmm2 +[ ]*[a-f0-9]+:[ ]*62 f5 74 89 38 c2[ ]+vcvtbiasps2hf8[ ]+xmm0\{k1\}\{z\},xmm1,xmm2 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 08 3a c1[ ]+vcvtps2hf8s[ ]+xmm0,xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 28 3a c1[ ]+vcvtps2hf8s[ ]+xmm0,ymm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 48 3a c1[ ]+vcvtps2hf8s[ ]+xmm0,zmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 08 3a 41 7f[ ]+vcvtps2hf8s[ ]+xmm0,XMMWORD PTR \[rcx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 f5 7e 28 3a 41 7f[ ]+vcvtps2hf8s[ ]+xmm0,YMMWORD PTR \[rcx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f5 7e 48 3a 41 7f[ ]+vcvtps2hf8s[ ]+xmm0,ZMMWORD PTR \[rcx\+0x1fc0\] +[ ]*[a-f0-9]+:[ ]*62 d5 7e 18 3a 01[ ]+vcvtps2hf8s[ ]+xmm0,DWORD BCST \[r9\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 d5 7e 38 3a 01[ ]+vcvtps2hf8s[ ]+xmm0,DWORD BCST \[r9\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 d5 7e 58 3a 01[ ]+vcvtps2hf8s[ ]+xmm0,DWORD BCST \[r9\]\{1to16\} +[ ]*[a-f0-9]+:[ ]*62 f5 7e 09 3a c1[ ]+vcvtps2hf8s[ ]+xmm0\{k1\},xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 89 3a c1[ ]+vcvtps2hf8s[ ]+xmm0\{k1\}\{z\},xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 74 08 3a c2[ ]+vcvtbiasps2hf8s[ ]+xmm0,xmm1,xmm2 +[ ]*[a-f0-9]+:[ ]*62 f5 74 28 3a c2[ ]+vcvtbiasps2hf8s[ ]+xmm0,ymm1,ymm2 +[ ]*[a-f0-9]+:[ ]*62 f5 74 48 3a c2[ ]+vcvtbiasps2hf8s[ ]+xmm0,zmm1,zmm2 +[ ]*[a-f0-9]+:[ ]*62 f5 74 08 3a 41 7f[ ]+vcvtbiasps2hf8s[ ]+xmm0,xmm1,XMMWORD PTR \[rcx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 f5 74 28 3a 41 7f[ ]+vcvtbiasps2hf8s[ ]+xmm0,ymm1,YMMWORD PTR \[rcx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f5 74 48 3a 41 7f[ ]+vcvtbiasps2hf8s[ ]+xmm0,zmm1,ZMMWORD PTR \[rcx\+0x1fc0\] +[ ]*[a-f0-9]+:[ ]*62 d5 74 18 3a 01[ ]+vcvtbiasps2hf8s[ ]+xmm0,xmm1,DWORD BCST \[r9\] +[ ]*[a-f0-9]+:[ ]*62 d5 74 38 3a 01[ ]+vcvtbiasps2hf8s[ ]+xmm0,ymm1,DWORD BCST \[r9\] +[ ]*[a-f0-9]+:[ ]*62 d5 74 58 3a 01[ ]+vcvtbiasps2hf8s[ ]+xmm0,zmm1,DWORD BCST \[r9\] +[ ]*[a-f0-9]+:[ ]*62 f5 74 09 3a c2[ ]+vcvtbiasps2hf8s[ ]+xmm0\{k1\},xmm1,xmm2 +[ ]*[a-f0-9]+:[ ]*62 f5 74 89 3a c2[ ]+vcvtbiasps2hf8s[ ]+xmm0\{k1\}\{z\},xmm1,xmm2 +[ ]*[a-f0-9]+:[ ]*62 f5 7d 08 38 c1[ ]+vcvtrops2hf8[ ]+xmm0,xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7d 28 38 c1[ ]+vcvtrops2hf8[ ]+xmm0,ymm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7d 48 38 c1[ ]+vcvtrops2hf8[ ]+xmm0,zmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7d 08 38 41 7f[ ]+vcvtrops2hf8[ ]+xmm0,XMMWORD PTR \[rcx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 f5 7d 28 38 41 7f[ ]+vcvtrops2hf8[ ]+xmm0,YMMWORD PTR \[rcx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f5 7d 48 38 41 7f[ ]+vcvtrops2hf8[ ]+xmm0,ZMMWORD PTR \[rcx\+0x1fc0\] +[ ]*[a-f0-9]+:[ ]*62 d5 7d 18 38 01[ ]+vcvtrops2hf8[ ]+xmm0,DWORD BCST \[r9\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 d5 7d 38 38 01[ ]+vcvtrops2hf8[ ]+xmm0,DWORD BCST \[r9\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 d5 7d 58 38 01[ ]+vcvtrops2hf8[ ]+xmm0,DWORD BCST \[r9\]\{1to16\} +[ ]*[a-f0-9]+:[ ]*62 f5 7d 09 38 c1[ ]+vcvtrops2hf8[ ]+xmm0\{k1\},xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7d 89 38 c1[ ]+vcvtrops2hf8[ ]+xmm0\{k1\}\{z\},xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7d 08 3a c1[ ]+vcvtrops2hf8s[ ]+xmm0,xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7d 28 3a c1[ ]+vcvtrops2hf8s[ ]+xmm0,ymm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7d 48 3a c1[ ]+vcvtrops2hf8s[ ]+xmm0,zmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7d 08 3a 41 7f[ ]+vcvtrops2hf8s[ ]+xmm0,XMMWORD PTR \[rcx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 f5 7d 28 3a 41 7f[ ]+vcvtrops2hf8s[ ]+xmm0,YMMWORD PTR \[rcx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f5 7d 48 3a 41 7f[ ]+vcvtrops2hf8s[ ]+xmm0,ZMMWORD PTR \[rcx\+0x1fc0\] +[ ]*[a-f0-9]+:[ ]*62 d5 7d 18 3a 01[ ]+vcvtrops2hf8s[ ]+xmm0,DWORD BCST \[r9\]\{1to4\} +[ ]*[a-f0-9]+:[ ]*62 d5 7d 38 3a 01[ ]+vcvtrops2hf8s[ ]+xmm0,DWORD BCST \[r9\]\{1to8\} +[ ]*[a-f0-9]+:[ ]*62 d5 7d 58 3a 01[ ]+vcvtrops2hf8s[ ]+xmm0,DWORD BCST \[r9\]\{1to16\} +[ ]*[a-f0-9]+:[ ]*62 f5 7d 09 3a c1[ ]+vcvtrops2hf8s[ ]+xmm0\{k1\},xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7d 89 3a c1[ ]+vcvtrops2hf8s[ ]+xmm0\{k1\}\{z\},xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 fc 08 36 c1[ ]+vcvtbf82ps[ ]+xmm0,xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 fc 28 36 c1[ ]+vcvtbf82ps[ ]+ymm0,xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 fc 48 36 c1[ ]+vcvtbf82ps[ ]+zmm0,xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 fc 08 36 41 7f[ ]+vcvtbf82ps[ ]+xmm0,DWORD PTR \[rcx\+0x1fc\] +[ ]*[a-f0-9]+:[ ]*62 f5 fc 28 36 41 7f[ ]+vcvtbf82ps[ ]+ymm0,QWORD PTR \[rcx\+0x3f8\] +[ ]*[a-f0-9]+:[ ]*62 f5 fc 48 36 41 7f[ ]+vcvtbf82ps[ ]+zmm0,XMMWORD PTR \[rcx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 f5 fc 09 36 c1[ ]+vcvtbf82ps[ ]+xmm0\{k1\},xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 fc 89 36 c1[ ]+vcvtbf82ps[ ]+xmm0\{k1\}\{z\},xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 fe 08 3d c8[ ]+vcvtbf82bf4s[ ]+xmm0,xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 fe 28 3d c8[ ]+vcvtbf82bf4s[ ]+xmm0,ymm1 +[ ]*[a-f0-9]+:[ ]*62 f5 fe 48 3d c8[ ]+vcvtbf82bf4s[ ]+ymm0,zmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 fe 08 3d 49 7f[ ]+vcvtbf82bf4s[ ]+QWORD PTR \[rcx\+0x3f8\],xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 fe 28 3d 49 7f[ ]+vcvtbf82bf4s[ ]+XMMWORD PTR \[rcx\+0x7f0\],ymm1 +[ ]*[a-f0-9]+:[ ]*62 f5 fe 48 3d 49 7f[ ]+vcvtbf82bf4s[ ]+YMMWORD PTR \[rcx\+0xfe0\],zmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7c 08 36 c1[ ]+vcvthf82ps[ ]+xmm0,xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7c 28 36 c1[ ]+vcvthf82ps[ ]+ymm0,xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7c 48 36 c1[ ]+vcvthf82ps[ ]+zmm0,xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7c 08 36 41 7f[ ]+vcvthf82ps[ ]+xmm0,DWORD PTR \[rcx\+0x1fc\] +[ ]*[a-f0-9]+:[ ]*62 f5 7c 28 36 41 7f[ ]+vcvthf82ps[ ]+ymm0,QWORD PTR \[rcx\+0x3f8\] +[ ]*[a-f0-9]+:[ ]*62 f5 7c 48 36 41 7f[ ]+vcvthf82ps[ ]+zmm0,XMMWORD PTR \[rcx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 f5 7c 09 36 c1[ ]+vcvthf82ps[ ]+xmm0\{k1\},xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7c 89 36 c1[ ]+vcvthf82ps[ ]+xmm0\{k1\}\{z\},xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 08 3d c8[ ]+vcvthf82bf4s[ ]+xmm0,xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 28 3d c8[ ]+vcvthf82bf4s[ ]+xmm0,ymm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 48 3d c8[ ]+vcvthf82bf4s[ ]+ymm0,zmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 08 3d 49 7f[ ]+vcvthf82bf4s[ ]+QWORD PTR \[rcx\+0x3f8\],xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 28 3d 49 7f[ ]+vcvthf82bf4s[ ]+XMMWORD PTR \[rcx\+0x7f0\],ymm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 48 3d 49 7f[ ]+vcvthf82bf4s[ ]+YMMWORD PTR \[rcx\+0xfe0\],zmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 fe 08 3e c1[ ]+vcvtbf82bf6s[ ]+xmm0,xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 fe 28 3e c1[ ]+vcvtbf82bf6s[ ]+ymm0,ymm1 +[ ]*[a-f0-9]+:[ ]*62 f5 fe 48 3e c1[ ]+vcvtbf82bf6s[ ]+zmm0,zmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 08 3c c1[ ]+vcvthf82hf6s[ ]+xmm0,xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 28 3c c1[ ]+vcvthf82hf6s[ ]+ymm0,ymm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 48 3c c1[ ]+vcvthf82hf6s[ ]+zmm0,zmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7c 08 37 c1[ ]+vcvtbf42hf8[ ]+xmm0,xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7c 28 37 c1[ ]+vcvtbf42hf8[ ]+ymm0,xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7c 48 37 c1[ ]+vcvtbf42hf8[ ]+zmm0,ymm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7c 08 37 41 7f[ ]+vcvtbf42hf8[ ]+xmm0,QWORD PTR \[rcx\+0x3f8\] +[ ]*[a-f0-9]+:[ ]*62 f5 7c 28 37 41 7f[ ]+vcvtbf42hf8[ ]+ymm0,XMMWORD PTR \[rcx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 f5 7c 48 37 41 7f[ ]+vcvtbf42hf8[ ]+zmm0,YMMWORD PTR \[rcx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f5 7c 09 37 c1[ ]+vcvtbf42hf8[ ]+xmm0\{k1\},xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7c 89 37 c1[ ]+vcvtbf42hf8[ ]+xmm0\{k1\}\{z\},xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 fd 08 37 c1[ ]+vcvtbf62hf8[ ]+xmm0,xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 fd 28 37 c1[ ]+vcvtbf62hf8[ ]+ymm0,ymm1 +[ ]*[a-f0-9]+:[ ]*62 f5 fd 48 37 c1[ ]+vcvtbf62hf8[ ]+zmm0,zmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 fd 09 37 c1[ ]+vcvtbf62hf8[ ]+xmm0\{k1\},xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 fd 89 37 c1[ ]+vcvtbf62hf8[ ]+xmm0\{k1\}\{z\},xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7d 08 37 c1[ ]+vcvthf62hf8[ ]+xmm0,xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7d 28 37 c1[ ]+vcvthf62hf8[ ]+ymm0,ymm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7d 48 37 c1[ ]+vcvthf62hf8[ ]+zmm0,zmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7d 09 37 c1[ ]+vcvthf62hf8[ ]+xmm0\{k1\},xmm1 +[ ]*[a-f0-9]+:[ ]*62 f5 7d 89 37 c1[ ]+vcvthf62hf8[ ]+xmm0\{k1\}\{z\},xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 7e 08 41 c8[ ]+vpmovssdb[ ]+xmm0,xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 7e 28 41 c8[ ]+vpmovssdb[ ]+xmm0,ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 7e 48 41 c8[ ]+vpmovssdb[ ]+xmm0,zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 7e 08 41 49 7f[ ]+vpmovssdb[ ]+DWORD PTR \[rcx\+0x1fc\],xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 7e 28 41 49 7f[ ]+vpmovssdb[ ]+QWORD PTR \[rcx\+0x3f8\],ymm1 +[ ]*[a-f0-9]+:[ ]*62 f2 7e 48 41 49 7f[ ]+vpmovssdb[ ]+XMMWORD PTR \[rcx\+0x7f0\],zmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 7e 09 41 c8[ ]+vpmovssdb[ ]+xmm0\{k1\},xmm1 +[ ]*[a-f0-9]+:[ ]*62 f2 7e 89 41 c8[ ]+vpmovssdb[ ]+xmm0\{k1\}\{z\},xmm1 +[ ]*[a-f0-9]+:[ ]*62 f3 7c 08 3d c1 10[ ]+vunpackb[ ]+xmm0,xmm1,0x10 +[ ]*[a-f0-9]+:[ ]*62 f3 7c 28 3d c1 10[ ]+vunpackb[ ]+ymm0,ymm1,0x10 +[ ]*[a-f0-9]+:[ ]*62 f3 7c 48 3d c1 10[ ]+vunpackb[ ]+zmm0,zmm1,0x10 +[ ]*[a-f0-9]+:[ ]*62 f3 7c 08 3d 41 7f 10[ ]+vunpackb[ ]+xmm0,XMMWORD PTR \[rcx\+0x7f0\],0x10 +[ ]*[a-f0-9]+:[ ]*62 f3 7c 28 3d 41 7f 10[ ]+vunpackb[ ]+ymm0,YMMWORD PTR \[rcx\+0xfe0\],0x10 +[ ]*[a-f0-9]+:[ ]*62 f3 7c 48 3d 41 7f 10[ ]+vunpackb[ ]+zmm0,ZMMWORD PTR \[rcx\+0x1fc0\],0x10 +[ ]*[a-f0-9]+:[ ]*62 f3 7c 09 3d c1 10[ ]+vunpackb[ ]+xmm0\{k1\},xmm1,0x10 +[ ]*[a-f0-9]+:[ ]*62 f3 7c 89 3d c1 10[ ]+vunpackb[ ]+xmm0\{k1\}\{z\},xmm1,0x10 diff --git a/gas/testsuite/gas/i386/x86-64-avx10_v2_aux.d b/gas/testsuite/gas/i386/x86-64-avx10_v2_aux.d new file mode 100644 index 00000000000..bb792e20ec6 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx10_v2_aux.d @@ -0,0 +1,187 @@ +#objdump: -dw -Mx86-64 +#name: x86-64 AVX10 V2 AUX + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +[ ]*[a-f0-9]+:[ ]*62 f5 7e 08 39 c1[ ]+vcvtps2bf8[ ]+%xmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 28 39 c1[ ]+vcvtps2bf8[ ]+%ymm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 48 39 c1[ ]+vcvtps2bf8[ ]+%zmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 08 39 41 7f[ ]+vcvtps2bf8x[ ]+0x7f0\(%rcx\),%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 28 39 41 7f[ ]+vcvtps2bf8y[ ]+0xfe0\(%rcx\),%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 48 39 41 7f[ ]+vcvtps2bf8z[ ]+0x1fc0\(%rcx\),%xmm0 +[ ]*[a-f0-9]+:[ ]*62 d5 7e 18 39 01[ ]+vcvtps2bf8[ ]+\(%r9\)\{1to4\},%xmm0 +[ ]*[a-f0-9]+:[ ]*62 d5 7e 38 39 01[ ]+vcvtps2bf8[ ]+\(%r9\)\{1to8\},%xmm0 +[ ]*[a-f0-9]+:[ ]*62 d5 7e 58 39 01[ ]+vcvtps2bf8[ ]+\(%r9\)\{1to16\},%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 09 39 c1[ ]+vcvtps2bf8[ ]+%xmm1,%xmm0\{%k1\} +[ ]*[a-f0-9]+:[ ]*62 f5 7e 89 39 c1[ ]+vcvtps2bf8[ ]+%xmm1,%xmm0\{%k1\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f5 74 08 39 c2[ ]+vcvtbiasps2bf8[ ]+%xmm2,%xmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 74 28 39 c2[ ]+vcvtbiasps2bf8[ ]+%ymm2,%ymm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 74 48 39 c2[ ]+vcvtbiasps2bf8[ ]+%zmm2,%zmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 74 08 39 41 7f[ ]+vcvtbiasps2bf8[ ]+0x7f0\(%rcx\),%xmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 74 28 39 41 7f[ ]+vcvtbiasps2bf8[ ]+0xfe0\(%rcx\),%ymm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 74 48 39 41 7f[ ]+vcvtbiasps2bf8[ ]+0x1fc0\(%rcx\),%zmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 d5 74 18 39 01[ ]+vcvtbiasps2bf8[ ]+\(%r9\)\{1to4\},%xmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 d5 74 38 39 01[ ]+vcvtbiasps2bf8[ ]+\(%r9\)\{1to8\},%ymm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 d5 74 58 39 01[ ]+vcvtbiasps2bf8[ ]+\(%r9\)\{1to16\},%zmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 74 09 39 c2[ ]+vcvtbiasps2bf8[ ]+%xmm2,%xmm1,%xmm0\{%k1\} +[ ]*[a-f0-9]+:[ ]*62 f5 74 89 39 c2[ ]+vcvtbiasps2bf8[ ]+%xmm2,%xmm1,%xmm0\{%k1\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f5 7e 08 3b c1[ ]+vcvtps2bf8s[ ]+%xmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 28 3b c1[ ]+vcvtps2bf8s[ ]+%ymm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 48 3b c1[ ]+vcvtps2bf8s[ ]+%zmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 08 3b 41 7f[ ]+vcvtps2bf8sx[ ]+0x7f0\(%rcx\),%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 28 3b 41 7f[ ]+vcvtps2bf8sy[ ]+0xfe0\(%rcx\),%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 48 3b 41 7f[ ]+vcvtps2bf8sz[ ]+0x1fc0\(%rcx\),%xmm0 +[ ]*[a-f0-9]+:[ ]*62 d5 7e 18 3b 01[ ]+vcvtps2bf8s[ ]+\(%r9\)\{1to4\},%xmm0 +[ ]*[a-f0-9]+:[ ]*62 d5 7e 38 3b 01[ ]+vcvtps2bf8s[ ]+\(%r9\)\{1to8\},%xmm0 +[ ]*[a-f0-9]+:[ ]*62 d5 7e 58 3b 01[ ]+vcvtps2bf8s[ ]+\(%r9\)\{1to16\},%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 09 3b c1[ ]+vcvtps2bf8s[ ]+%xmm1,%xmm0\{%k1\} +[ ]*[a-f0-9]+:[ ]*62 f5 7e 89 3b c1[ ]+vcvtps2bf8s[ ]+%xmm1,%xmm0\{%k1\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f5 74 08 3b c2[ ]+vcvtbiasps2bf8s[ ]+%xmm2,%xmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 74 28 3b c2[ ]+vcvtbiasps2bf8s[ ]+%ymm2,%ymm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 74 48 3b c2[ ]+vcvtbiasps2bf8s[ ]+%zmm2,%zmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 74 08 3b 41 7f[ ]+vcvtbiasps2bf8s[ ]+0x7f0\(%rcx\),%xmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 74 28 3b 41 7f[ ]+vcvtbiasps2bf8s[ ]+0xfe0\(%rcx\),%ymm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 74 48 3b 41 7f[ ]+vcvtbiasps2bf8s[ ]+0x1fc0\(%rcx\),%zmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 d5 74 18 3b 01[ ]+vcvtbiasps2bf8s[ ]+\(%r9\)\{1to4\},%xmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 d5 74 38 3b 01[ ]+vcvtbiasps2bf8s[ ]+\(%r9\)\{1to8\},%ymm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 d5 74 58 3b 01[ ]+vcvtbiasps2bf8s[ ]+\(%r9\)\{1to16\},%zmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 74 09 3b c2[ ]+vcvtbiasps2bf8s[ ]+%xmm2,%xmm1,%xmm0\{%k1\} +[ ]*[a-f0-9]+:[ ]*62 f5 74 89 3b c2[ ]+vcvtbiasps2bf8s[ ]+%xmm2,%xmm1,%xmm0\{%k1\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f5 7e 08 38 c1[ ]+vcvtps2hf8[ ]+%xmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 28 38 c1[ ]+vcvtps2hf8[ ]+%ymm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 48 38 c1[ ]+vcvtps2hf8[ ]+%zmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 08 38 41 7f[ ]+vcvtps2hf8x[ ]+0x7f0\(%rcx\),%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 28 38 41 7f[ ]+vcvtps2hf8y[ ]+0xfe0\(%rcx\),%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 48 38 41 7f[ ]+vcvtps2hf8z[ ]+0x1fc0\(%rcx\),%xmm0 +[ ]*[a-f0-9]+:[ ]*62 d5 7e 18 38 01[ ]+vcvtps2hf8[ ]+\(%r9\)\{1to4\},%xmm0 +[ ]*[a-f0-9]+:[ ]*62 d5 7e 38 38 01[ ]+vcvtps2hf8[ ]+\(%r9\)\{1to8\},%xmm0 +[ ]*[a-f0-9]+:[ ]*62 d5 7e 58 38 01[ ]+vcvtps2hf8[ ]+\(%r9\)\{1to16\},%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 09 38 c1[ ]+vcvtps2hf8[ ]+%xmm1,%xmm0\{%k1\} +[ ]*[a-f0-9]+:[ ]*62 f5 7e 89 38 c1[ ]+vcvtps2hf8[ ]+%xmm1,%xmm0\{%k1\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f5 74 08 38 c2[ ]+vcvtbiasps2hf8[ ]+%xmm2,%xmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 74 28 38 c2[ ]+vcvtbiasps2hf8[ ]+%ymm2,%ymm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 74 48 38 c2[ ]+vcvtbiasps2hf8[ ]+%zmm2,%zmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 74 08 38 41 7f[ ]+vcvtbiasps2hf8[ ]+0x7f0\(%rcx\),%xmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 74 28 38 41 7f[ ]+vcvtbiasps2hf8[ ]+0xfe0\(%rcx\),%ymm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 74 48 38 41 7f[ ]+vcvtbiasps2hf8[ ]+0x1fc0\(%rcx\),%zmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 d5 74 18 38 01[ ]+vcvtbiasps2hf8[ ]+\(%r9\)\{1to4\},%xmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 d5 74 38 38 01[ ]+vcvtbiasps2hf8[ ]+\(%r9\)\{1to8\},%ymm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 d5 74 58 38 01[ ]+vcvtbiasps2hf8[ ]+\(%r9\)\{1to16\},%zmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 74 09 38 c2[ ]+vcvtbiasps2hf8[ ]+%xmm2,%xmm1,%xmm0\{%k1\} +[ ]*[a-f0-9]+:[ ]*62 f5 74 89 38 c2[ ]+vcvtbiasps2hf8[ ]+%xmm2,%xmm1,%xmm0\{%k1\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f5 7e 08 3a c1[ ]+vcvtps2hf8s[ ]+%xmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 28 3a c1[ ]+vcvtps2hf8s[ ]+%ymm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 48 3a c1[ ]+vcvtps2hf8s[ ]+%zmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 08 3a 41 7f[ ]+vcvtps2hf8sx[ ]+0x7f0\(%rcx\),%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 28 3a 41 7f[ ]+vcvtps2hf8sy[ ]+0xfe0\(%rcx\),%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 48 3a 41 7f[ ]+vcvtps2hf8sz[ ]+0x1fc0\(%rcx\),%xmm0 +[ ]*[a-f0-9]+:[ ]*62 d5 7e 18 3a 01[ ]+vcvtps2hf8s[ ]+\(%r9\)\{1to4\},%xmm0 +[ ]*[a-f0-9]+:[ ]*62 d5 7e 38 3a 01[ ]+vcvtps2hf8s[ ]+\(%r9\)\{1to8\},%xmm0 +[ ]*[a-f0-9]+:[ ]*62 d5 7e 58 3a 01[ ]+vcvtps2hf8s[ ]+\(%r9\)\{1to16\},%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 09 3a c1[ ]+vcvtps2hf8s[ ]+%xmm1,%xmm0\{%k1\} +[ ]*[a-f0-9]+:[ ]*62 f5 7e 89 3a c1[ ]+vcvtps2hf8s[ ]+%xmm1,%xmm0\{%k1\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f5 74 08 3a c2[ ]+vcvtbiasps2hf8s[ ]+%xmm2,%xmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 74 28 3a c2[ ]+vcvtbiasps2hf8s[ ]+%ymm2,%ymm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 74 48 3a c2[ ]+vcvtbiasps2hf8s[ ]+%zmm2,%zmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 74 08 3a 41 7f[ ]+vcvtbiasps2hf8s[ ]+0x7f0\(%rcx\),%xmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 74 28 3a 41 7f[ ]+vcvtbiasps2hf8s[ ]+0xfe0\(%rcx\),%ymm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 74 48 3a 41 7f[ ]+vcvtbiasps2hf8s[ ]+0x1fc0\(%rcx\),%zmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 d5 74 18 3a 01[ ]+vcvtbiasps2hf8s[ ]+\(%r9\)\{1to4\},%xmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 d5 74 38 3a 01[ ]+vcvtbiasps2hf8s[ ]+\(%r9\)\{1to8\},%ymm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 d5 74 58 3a 01[ ]+vcvtbiasps2hf8s[ ]+\(%r9\)\{1to16\},%zmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 74 09 3a c2[ ]+vcvtbiasps2hf8s[ ]+%xmm2,%xmm1,%xmm0\{%k1\} +[ ]*[a-f0-9]+:[ ]*62 f5 74 89 3a c2[ ]+vcvtbiasps2hf8s[ ]+%xmm2,%xmm1,%xmm0\{%k1\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f5 7d 08 38 c1[ ]+vcvtrops2hf8[ ]+%xmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7d 28 38 c1[ ]+vcvtrops2hf8[ ]+%ymm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7d 48 38 c1[ ]+vcvtrops2hf8[ ]+%zmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7d 08 38 41 7f[ ]+vcvtrops2hf8x[ ]+0x7f0\(%rcx\),%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7d 28 38 41 7f[ ]+vcvtrops2hf8y[ ]+0xfe0\(%rcx\),%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7d 48 38 41 7f[ ]+vcvtrops2hf8z[ ]+0x1fc0\(%rcx\),%xmm0 +[ ]*[a-f0-9]+:[ ]*62 d5 7d 18 38 01[ ]+vcvtrops2hf8[ ]+\(%r9\)\{1to4\},%xmm0 +[ ]*[a-f0-9]+:[ ]*62 d5 7d 38 38 01[ ]+vcvtrops2hf8[ ]+\(%r9\)\{1to8\},%xmm0 +[ ]*[a-f0-9]+:[ ]*62 d5 7d 58 38 01[ ]+vcvtrops2hf8[ ]+\(%r9\)\{1to16\},%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7d 09 38 c1[ ]+vcvtrops2hf8[ ]+%xmm1,%xmm0\{%k1\} +[ ]*[a-f0-9]+:[ ]*62 f5 7d 89 38 c1[ ]+vcvtrops2hf8[ ]+%xmm1,%xmm0\{%k1\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f5 7d 08 3a c1[ ]+vcvtrops2hf8s[ ]+%xmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7d 28 3a c1[ ]+vcvtrops2hf8s[ ]+%ymm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7d 48 3a c1[ ]+vcvtrops2hf8s[ ]+%zmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7d 08 3a 41 7f[ ]+vcvtrops2hf8sx[ ]+0x7f0\(%rcx\),%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7d 28 3a 41 7f[ ]+vcvtrops2hf8sy[ ]+0xfe0\(%rcx\),%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7d 48 3a 41 7f[ ]+vcvtrops2hf8sz[ ]+0x1fc0\(%rcx\),%xmm0 +[ ]*[a-f0-9]+:[ ]*62 d5 7d 18 3a 01[ ]+vcvtrops2hf8s[ ]+\(%r9\)\{1to4\},%xmm0 +[ ]*[a-f0-9]+:[ ]*62 d5 7d 38 3a 01[ ]+vcvtrops2hf8s[ ]+\(%r9\)\{1to8\},%xmm0 +[ ]*[a-f0-9]+:[ ]*62 d5 7d 58 3a 01[ ]+vcvtrops2hf8s[ ]+\(%r9\)\{1to16\},%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7d 09 3a c1[ ]+vcvtrops2hf8s[ ]+%xmm1,%xmm0\{%k1\} +[ ]*[a-f0-9]+:[ ]*62 f5 7d 89 3a c1[ ]+vcvtrops2hf8s[ ]+%xmm1,%xmm0\{%k1\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f5 fc 08 36 c1[ ]+vcvtbf82ps[ ]+%xmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 fc 28 36 c1[ ]+vcvtbf82ps[ ]+%xmm1,%ymm0 +[ ]*[a-f0-9]+:[ ]*62 f5 fc 48 36 c1[ ]+vcvtbf82ps[ ]+%xmm1,%zmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 fc 08 36 41 7f[ ]+vcvtbf82ps[ ]+0x1fc\(%rcx\),%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 fc 28 36 41 7f[ ]+vcvtbf82ps[ ]+0x3f8\(%rcx\),%ymm0 +[ ]*[a-f0-9]+:[ ]*62 f5 fc 48 36 41 7f[ ]+vcvtbf82ps[ ]+0x7f0\(%rcx\),%zmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 fc 09 36 c1[ ]+vcvtbf82ps[ ]+%xmm1,%xmm0\{%k1\} +[ ]*[a-f0-9]+:[ ]*62 f5 fc 89 36 c1[ ]+vcvtbf82ps[ ]+%xmm1,%xmm0\{%k1\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f5 fe 08 3d c8[ ]+vcvtbf82bf4s[ ]+%xmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 fe 28 3d c8[ ]+vcvtbf82bf4s[ ]+%ymm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 fe 48 3d c8[ ]+vcvtbf82bf4s[ ]+%zmm1,%ymm0 +[ ]*[a-f0-9]+:[ ]*62 f5 fe 08 3d 49 7f[ ]+vcvtbf82bf4s[ ]+%xmm1,0x3f8\(%rcx\) +[ ]*[a-f0-9]+:[ ]*62 f5 fe 28 3d 49 7f[ ]+vcvtbf82bf4s[ ]+%ymm1,0x7f0\(%rcx\) +[ ]*[a-f0-9]+:[ ]*62 f5 fe 48 3d 49 7f[ ]+vcvtbf82bf4s[ ]+%zmm1,0xfe0\(%rcx\) +[ ]*[a-f0-9]+:[ ]*62 f5 7c 08 36 c1[ ]+vcvthf82ps[ ]+%xmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7c 28 36 c1[ ]+vcvthf82ps[ ]+%xmm1,%ymm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7c 48 36 c1[ ]+vcvthf82ps[ ]+%xmm1,%zmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7c 08 36 41 7f[ ]+vcvthf82ps[ ]+0x1fc\(%rcx\),%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7c 28 36 41 7f[ ]+vcvthf82ps[ ]+0x3f8\(%rcx\),%ymm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7c 48 36 41 7f[ ]+vcvthf82ps[ ]+0x7f0\(%rcx\),%zmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7c 09 36 c1[ ]+vcvthf82ps[ ]+%xmm1,%xmm0\{%k1\} +[ ]*[a-f0-9]+:[ ]*62 f5 7c 89 36 c1[ ]+vcvthf82ps[ ]+%xmm1,%xmm0\{%k1\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f5 7e 08 3d c8[ ]+vcvthf82bf4s[ ]+%xmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 28 3d c8[ ]+vcvthf82bf4s[ ]+%ymm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 48 3d c8[ ]+vcvthf82bf4s[ ]+%zmm1,%ymm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 08 3d 49 7f[ ]+vcvthf82bf4s[ ]+%xmm1,0x3f8\(%rcx\) +[ ]*[a-f0-9]+:[ ]*62 f5 7e 28 3d 49 7f[ ]+vcvthf82bf4s[ ]+%ymm1,0x7f0\(%rcx\) +[ ]*[a-f0-9]+:[ ]*62 f5 7e 48 3d 49 7f[ ]+vcvthf82bf4s[ ]+%zmm1,0xfe0\(%rcx\) +[ ]*[a-f0-9]+:[ ]*62 f5 fe 08 3e c1[ ]+vcvtbf82bf6s[ ]+%xmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 fe 28 3e c1[ ]+vcvtbf82bf6s[ ]+%ymm1,%ymm0 +[ ]*[a-f0-9]+:[ ]*62 f5 fe 48 3e c1[ ]+vcvtbf82bf6s[ ]+%zmm1,%zmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 08 3c c1[ ]+vcvthf82hf6s[ ]+%xmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 28 3c c1[ ]+vcvthf82hf6s[ ]+%ymm1,%ymm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7e 48 3c c1[ ]+vcvthf82hf6s[ ]+%zmm1,%zmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7c 08 37 c1[ ]+vcvtbf42hf8[ ]+%xmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7c 28 37 c1[ ]+vcvtbf42hf8[ ]+%xmm1,%ymm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7c 48 37 c1[ ]+vcvtbf42hf8[ ]+%ymm1,%zmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7c 08 37 41 7f[ ]+vcvtbf42hf8[ ]+0x3f8\(%rcx\),%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7c 28 37 41 7f[ ]+vcvtbf42hf8[ ]+0x7f0\(%rcx\),%ymm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7c 48 37 41 7f[ ]+vcvtbf42hf8[ ]+0xfe0\(%rcx\),%zmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7c 09 37 c1[ ]+vcvtbf42hf8[ ]+%xmm1,%xmm0\{%k1\} +[ ]*[a-f0-9]+:[ ]*62 f5 7c 89 37 c1[ ]+vcvtbf42hf8[ ]+%xmm1,%xmm0\{%k1\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f5 fd 08 37 c1[ ]+vcvtbf62hf8[ ]+%xmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 fd 28 37 c1[ ]+vcvtbf62hf8[ ]+%ymm1,%ymm0 +[ ]*[a-f0-9]+:[ ]*62 f5 fd 48 37 c1[ ]+vcvtbf62hf8[ ]+%zmm1,%zmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 fd 09 37 c1[ ]+vcvtbf62hf8[ ]+%xmm1,%xmm0\{%k1\} +[ ]*[a-f0-9]+:[ ]*62 f5 fd 89 37 c1[ ]+vcvtbf62hf8[ ]+%xmm1,%xmm0\{%k1\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f5 7d 08 37 c1[ ]+vcvthf62hf8[ ]+%xmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7d 28 37 c1[ ]+vcvthf62hf8[ ]+%ymm1,%ymm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7d 48 37 c1[ ]+vcvthf62hf8[ ]+%zmm1,%zmm0 +[ ]*[a-f0-9]+:[ ]*62 f5 7d 09 37 c1[ ]+vcvthf62hf8[ ]+%xmm1,%xmm0\{%k1\} +[ ]*[a-f0-9]+:[ ]*62 f5 7d 89 37 c1[ ]+vcvthf62hf8[ ]+%xmm1,%xmm0\{%k1\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f2 7e 08 41 c8[ ]+vpmovssdb[ ]+%xmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f2 7e 28 41 c8[ ]+vpmovssdb[ ]+%ymm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f2 7e 48 41 c8[ ]+vpmovssdb[ ]+%zmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f2 7e 08 41 49 7f[ ]+vpmovssdb[ ]+%xmm1,0x1fc\(%rcx\) +[ ]*[a-f0-9]+:[ ]*62 f2 7e 28 41 49 7f[ ]+vpmovssdb[ ]+%ymm1,0x3f8\(%rcx\) +[ ]*[a-f0-9]+:[ ]*62 f2 7e 48 41 49 7f[ ]+vpmovssdb[ ]+%zmm1,0x7f0\(%rcx\) +[ ]*[a-f0-9]+:[ ]*62 f2 7e 09 41 c8[ ]+vpmovssdb[ ]+%xmm1,%xmm0\{%k1\} +[ ]*[a-f0-9]+:[ ]*62 f2 7e 89 41 c8[ ]+vpmovssdb[ ]+%xmm1,%xmm0\{%k1\}\{z\} +[ ]*[a-f0-9]+:[ ]*62 f3 7c 08 3d c1 10[ ]+vunpackb[ ]+\$0x10,%xmm1,%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f3 7c 28 3d c1 10[ ]+vunpackb[ ]+\$0x10,%ymm1,%ymm0 +[ ]*[a-f0-9]+:[ ]*62 f3 7c 48 3d c1 10[ ]+vunpackb[ ]+\$0x10,%zmm1,%zmm0 +[ ]*[a-f0-9]+:[ ]*62 f3 7c 08 3d 41 7f 10[ ]+vunpackb[ ]+\$0x10,0x7f0\(%rcx\),%xmm0 +[ ]*[a-f0-9]+:[ ]*62 f3 7c 28 3d 41 7f 10[ ]+vunpackb[ ]+\$0x10,0xfe0\(%rcx\),%ymm0 +[ ]*[a-f0-9]+:[ ]*62 f3 7c 48 3d 41 7f 10[ ]+vunpackb[ ]+\$0x10,0x1fc0\(%rcx\),%zmm0 +[ ]*[a-f0-9]+:[ ]*62 f3 7c 09 3d c1 10[ ]+vunpackb[ ]+\$0x10,%xmm1,%xmm0\{%k1\} +[ ]*[a-f0-9]+:[ ]*62 f3 7c 89 3d c1 10[ ]+vunpackb[ ]+\$0x10,%xmm1,%xmm0\{%k1\}\{z\} +#pass diff --git a/gas/testsuite/gas/i386/x86-64-avx10_v2_aux.s b/gas/testsuite/gas/i386/x86-64-avx10_v2_aux.s new file mode 100644 index 00000000000..71506e5e5ec --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx10_v2_aux.s @@ -0,0 +1,210 @@ +# Check 64-bit AVX10 V2 AUX instructions + + .arch generic64 + .arch .avx10v2aux + .text +_start: + .irp m, bf8, bf8s, hf8, hf8s + vcvtps2\m %xmm1, %xmm0 + vcvtps2\m %ymm1, %xmm0 + vcvtps2\m %zmm1, %xmm0 + vcvtps2\m\()x 2032(%rcx), %xmm0 + vcvtps2\m\()y 4064(%rcx), %xmm0 + vcvtps2\m\()z 8128(%rcx), %xmm0 + vcvtps2\m (%r9){1to4}, %xmm0 + vcvtps2\m (%r9){1to8}, %xmm0 + vcvtps2\m (%r9){1to16}, %xmm0 + vcvtps2\m %xmm1, %xmm0{%k1} + vcvtps2\m %xmm1, %xmm0{%k1}{z} + + vcvtbiasps2\m %xmm2, %xmm1, %xmm0 + vcvtbiasps2\m %ymm2, %ymm1, %xmm0 + vcvtbiasps2\m %zmm2, %zmm1, %xmm0 + vcvtbiasps2\m 2032(%rcx), %xmm1, %xmm0 + vcvtbiasps2\m 4064(%rcx), %ymm1, %xmm0 + vcvtbiasps2\m 8128(%rcx), %zmm1, %xmm0 + vcvtbiasps2\m (%r9){1to4}, %xmm1, %xmm0 + vcvtbiasps2\m (%r9){1to8}, %ymm1, %xmm0 + vcvtbiasps2\m (%r9){1to16}, %zmm1, %xmm0 + vcvtbiasps2\m %xmm2, %xmm1, %xmm0{%k1} + vcvtbiasps2\m %xmm2, %xmm1, %xmm0{%k1}{z} + .endr + + .irp m, hf8, hf8s + vcvtrops2\m %xmm1, %xmm0 + vcvtrops2\m %ymm1, %xmm0 + vcvtrops2\m %zmm1, %xmm0 + vcvtrops2\m\()x 2032(%rcx), %xmm0 + vcvtrops2\m\()y 4064(%rcx), %xmm0 + vcvtrops2\m\()z 8128(%rcx), %xmm0 + vcvtrops2\m (%r9){1to4}, %xmm0 + vcvtrops2\m (%r9){1to8}, %xmm0 + vcvtrops2\m (%r9){1to16}, %xmm0 + vcvtrops2\m %xmm1, %xmm0{%k1} + vcvtrops2\m %xmm1, %xmm0{%k1}{z} + .endr + + .irp f, bf, hf + vcvt\f\()82ps %xmm1, %xmm0 + vcvt\f\()82ps %xmm1, %ymm0 + vcvt\f\()82ps %xmm1, %zmm0 + vcvt\f\()82ps 508(%rcx), %xmm0 + vcvt\f\()82ps 1016(%rcx), %ymm0 + vcvt\f\()82ps 2032(%rcx), %zmm0 + vcvt\f\()82ps %xmm1, %xmm0{%k1} + vcvt\f\()82ps %xmm1, %xmm0{%k1}{z} + + vcvt\f\()82bf4s %xmm1, %xmm0 + vcvt\f\()82bf4s %ymm1, %xmm0 + vcvt\f\()82bf4s %zmm1, %ymm0 + vcvt\f\()82bf4s %xmm1, 1016(%rcx) + vcvt\f\()82bf4s %ymm1, 2032(%rcx) + vcvt\f\()82bf4s %zmm1, 4064(%rcx) + .endr + + vcvtbf82bf6s %xmm1, %xmm0 + vcvtbf82bf6s %ymm1, %ymm0 + vcvtbf82bf6s %zmm1, %zmm0 + + vcvthf82hf6s %xmm1, %xmm0 + vcvthf82hf6s %ymm1, %ymm0 + vcvthf82hf6s %zmm1, %zmm0 + + vcvtbf42hf8 %xmm1, %xmm0 + vcvtbf42hf8 %xmm1, %ymm0 + vcvtbf42hf8 %ymm1, %zmm0 + vcvtbf42hf8 1016(%rcx), %xmm0 + vcvtbf42hf8 2032(%rcx), %ymm0 + vcvtbf42hf8 4064(%rcx), %zmm0 + vcvtbf42hf8 %xmm1, %xmm0{%k1} + vcvtbf42hf8 %xmm1, %xmm0{%k1}{z} + + .irp f, bf, hf + vcvt\f\()62hf8 %xmm1, %xmm0 + vcvt\f\()62hf8 %ymm1, %ymm0 + vcvt\f\()62hf8 %zmm1, %zmm0 + vcvt\f\()62hf8 %xmm1, %xmm0{%k1} + vcvt\f\()62hf8 %xmm1, %xmm0{%k1}{z} + .endr + + vpmovssdb %xmm1, %xmm0 + vpmovssdb %ymm1, %xmm0 + vpmovssdb %zmm1, %xmm0 + vpmovssdb %xmm1, 508(%rcx) + vpmovssdb %ymm1, 1016(%rcx) + vpmovssdb %zmm1, 2032(%rcx) + vpmovssdb %xmm1, %xmm0{%k1} + vpmovssdb %xmm1, %xmm0{%k1}{z} + + vunpackb $0x10, %xmm1, %xmm0 + vunpackb $0x10, %ymm1, %ymm0 + vunpackb $0x10, %zmm1, %zmm0 + vunpackb $0x10, 2032(%rcx), %xmm0 + vunpackb $0x10, 4064(%rcx), %ymm0 + vunpackb $0x10, 8128(%rcx), %zmm0 + vunpackb $0x10, %xmm1, %xmm0{%k1} + vunpackb $0x10, %xmm1, %xmm0{%k1}{z} + +_intel: + .intel_syntax noprefix + + .irp m, bf8, bf8s, hf8, hf8s + vcvtps2\m xmm0, xmm1 + vcvtps2\m xmm0, ymm1 + vcvtps2\m xmm0, zmm1 + vcvtps2\m xmm0, XMMWORD PTR [rcx+2032] + vcvtps2\m xmm0, YMMWORD PTR [rcx+4064] + vcvtps2\m xmm0, ZMMWORD PTR [rcx+8128] + vcvtps2\m xmm0, DWORD PTR [r9]{1to4} + vcvtps2\m xmm0, DWORD PTR [r9]{1to8} + vcvtps2\m xmm0, DWORD PTR [r9]{1to16} + vcvtps2\m xmm0{k1}, xmm1 + vcvtps2\m xmm0{k1}{z}, xmm1 + + vcvtbiasps2\m xmm0, xmm1, xmm2 + vcvtbiasps2\m xmm0, ymm1, ymm2 + vcvtbiasps2\m xmm0, zmm1, zmm2 + vcvtbiasps2\m xmm0, xmm1, XMMWORD PTR [rcx+2032] + vcvtbiasps2\m xmm0, ymm1, YMMWORD PTR [rcx+4064] + vcvtbiasps2\m xmm0, zmm1, ZMMWORD PTR [rcx+8128] + vcvtbiasps2\m xmm0, xmm1, DWORD PTR [r9]{1to4} + vcvtbiasps2\m xmm0, ymm1, DWORD PTR [r9]{1to8} + vcvtbiasps2\m xmm0, zmm1, DWORD PTR [r9]{1to16} + vcvtbiasps2\m xmm0{k1}, xmm1, xmm2 + vcvtbiasps2\m xmm0{k1}{z}, xmm1, xmm2 + .endr + + .irp m, hf8, hf8s + vcvtrops2\m xmm0, xmm1 + vcvtrops2\m xmm0, ymm1 + vcvtrops2\m xmm0, zmm1 + vcvtrops2\m xmm0, XMMWORD PTR [rcx+2032] + vcvtrops2\m xmm0, YMMWORD PTR [rcx+4064] + vcvtrops2\m xmm0, ZMMWORD PTR [rcx+8128] + vcvtrops2\m xmm0, DWORD PTR [r9]{1to4} + vcvtrops2\m xmm0, DWORD PTR [r9]{1to8} + vcvtrops2\m xmm0, DWORD PTR [r9]{1to16} + vcvtrops2\m xmm0{k1}, xmm1 + vcvtrops2\m xmm0{k1}{z}, xmm1 + .endr + + .irp f, bf, hf + vcvt\f\()82ps xmm0, xmm1 + vcvt\f\()82ps ymm0, xmm1 + vcvt\f\()82ps zmm0, xmm1 + vcvt\f\()82ps xmm0, DWORD PTR [rcx+508] + vcvt\f\()82ps ymm0, QWORD PTR [rcx+1016] + vcvt\f\()82ps zmm0, XMMWORD PTR [rcx+2032] + vcvt\f\()82ps xmm0{k1}, xmm1 + vcvt\f\()82ps xmm0{k1}{z}, xmm1 + + vcvt\f\()82bf4s xmm0, xmm1 + vcvt\f\()82bf4s xmm0, ymm1 + vcvt\f\()82bf4s ymm0, zmm1 + vcvt\f\()82bf4s QWORD PTR [rcx+1016], xmm1 + vcvt\f\()82bf4s XMMWORD PTR [rcx+2032], ymm1 + vcvt\f\()82bf4s YMMWORD PTR [rcx+4064], zmm1 + .endr + + vcvtbf82bf6s xmm0, xmm1 + vcvtbf82bf6s ymm0, ymm1 + vcvtbf82bf6s zmm0, zmm1 + + vcvthf82hf6s xmm0, xmm1 + vcvthf82hf6s ymm0, ymm1 + vcvthf82hf6s zmm0, zmm1 + + vcvtbf42hf8 xmm0, xmm1 + vcvtbf42hf8 ymm0, xmm1 + vcvtbf42hf8 zmm0, ymm1 + vcvtbf42hf8 xmm0, QWORD PTR [rcx+1016] + vcvtbf42hf8 ymm0, XMMWORD PTR [rcx+2032] + vcvtbf42hf8 zmm0, YMMWORD PTR [rcx+4064] + vcvtbf42hf8 xmm0{k1}, xmm1 + vcvtbf42hf8 xmm0{k1}{z}, xmm1 + + .irp f, bf, hf + vcvt\f\()62hf8 xmm0, xmm1 + vcvt\f\()62hf8 ymm0, ymm1 + vcvt\f\()62hf8 zmm0, zmm1 + vcvt\f\()62hf8 xmm0{k1}, xmm1 + vcvt\f\()62hf8 xmm0{k1}{z}, xmm1 + .endr + + vpmovssdb xmm0, xmm1 + vpmovssdb xmm0, ymm1 + vpmovssdb xmm0, zmm1 + vpmovssdb DWORD PTR [rcx+508], xmm1 + vpmovssdb QWORD PTR [rcx+1016], ymm1 + vpmovssdb XMMWORD PTR [rcx+2032], zmm1 + vpmovssdb xmm0{k1}, xmm1 + vpmovssdb xmm0{k1}{z}, xmm1 + + vunpackb xmm0, xmm1, 0x10 + vunpackb ymm0, ymm1, 0x10 + vunpackb zmm0, zmm1, 0x10 + vunpackb xmm0, XMMWORD PTR [rcx+2032], 0x10 + vunpackb ymm0, YMMWORD PTR [rcx+4064], 0x10 + vunpackb zmm0, ZMMWORD PTR [rcx+8128], 0x10 + vunpackb xmm0{k1}, xmm1, 0x10 + vunpackb xmm0{k1}{z}, xmm1, 0x10 diff --git a/gas/testsuite/gas/i386/x86-64.exp b/gas/testsuite/gas/i386/x86-64.exp index 710f749a8dc..fee205b9659 100644 --- a/gas/testsuite/gas/i386/x86-64.exp +++ b/gas/testsuite/gas/i386/x86-64.exp @@ -527,6 +527,8 @@ run_dump_test "x86-64-avx10_2-256-sm4-intel" run_dump_test "x86-64-avx10_2-512-sm4" run_dump_test "x86-64-avx10_2-512-sm4-intel" run_list_test "x86-64-avx10_2-sm4-inval" +run_dump_test "x86-64-avx10_v2_aux" +run_dump_test "x86-64-avx10_v2_aux-intel" run_dump_test "x86-64-amx-transpose" run_dump_test "x86-64-amx-transpose-intel" run_list_test "x86-64-amx-transpose-inval" diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h index 1aeac210c5d..0135703912a 100644 --- a/opcodes/i386-dis-evex-prefix.h +++ b/opcodes/i386-dis-evex-prefix.h @@ -243,6 +243,11 @@ { VEX_W_TABLE (EVEX_W_0F383A_P_1) }, { "%XEvpminuw", { XM, Vex, EXx }, 0 }, }, + /* PREFIX_EVEX_0F3841_W_0 */ + { + { Bad_Opcode }, + { "vpmovssdb", { EXxmmqd, XM }, 0 }, + }, /* PREFIX_EVEX_0F384A_W_0_L_2 */ { { Bad_Opcode }, @@ -614,6 +619,53 @@ { Bad_Opcode }, { "vmovrs%BW", { XM, Mx }, 0 }, }, + /* PREFIX_EVEX_MAP5_36 */ + { + { "vcvt%HB82ps", { XM, EXxmmqd }, 0 }, + }, + /* PREFIX_EVEX_MAP5_37 */ + { + { VEX_W_TABLE (EVEX_W_MAP5_37_P_0) }, + { Bad_Opcode }, + { "vcvt%HB62hf8", { XM, Ux }, 0 }, + }, + /* PREFIX_EVEX_MAP5_38_W_0 */ + { + { "vcvtbiasps2hf8", { XMM, Vex, EXx }, 0 }, + { "vcvtps2hf8%XZ", { XMM, EXx }, 0 }, + { "vcvtrops2hf8%XZ", { XMM, EXx }, 0 }, + }, + /* PREFIX_EVEX_MAP5_39_W_0 */ + { + { "vcvtbiasps2bf8", { XMM, Vex, EXx }, 0 }, + { "vcvtps2bf8%XZ", { XMM, EXx }, 0 }, + }, + /* PREFIX_EVEX_MAP5_3A_W_0 */ + { + { "vcvtbiasps2hf8s", { XMM, Vex, EXx }, 0 }, + { "vcvtps2hf8s%XZ", { XMM, EXx }, 0 }, + { "vcvtrops2hf8s%XZ", { XMM, EXx }, 0 }, + }, + /* PREFIX_EVEX_MAP5_3B_W_0 */ + { + { "vcvtbiasps2bf8s", { XMM, Vex, EXx }, 0 }, + { "vcvtps2bf8s%XZ", { XMM, EXx }, 0 }, + }, + /* PREFIX_EVEX_MAP5_3C_W_0 */ + { + { Bad_Opcode }, + { "vcvthf82hf6s", { XM, Ux }, 0 }, + }, + /* PREFIX_EVEX_MAP5_3D */ + { + { Bad_Opcode }, + { "vcvt%HB82bf4s", { EXxmmq, XM }, 0 }, + }, + /* PREFIX_EVEX_MAP5_3E_W_1 */ + { + { Bad_Opcode }, + { "vcvtbf82bf6s", { XM, Ux }, 0 }, + }, /* PREFIX_EVEX_MAP5_74 */ { { "vcvtbiasp%XH2bf8s", { XMxmmq, Vex, EXxh }, 0 }, diff --git a/opcodes/i386-dis-evex-w.h b/opcodes/i386-dis-evex-w.h index 310f121f499..e5b0cb805bb 100644 --- a/opcodes/i386-dis-evex-w.h +++ b/opcodes/i386-dis-evex-w.h @@ -346,6 +346,10 @@ { { "vpbroadcastmw2dY", { XM, MaskR }, 0 }, }, + /* EVEX_W_0F3841 */ + { + { PREFIX_TABLE (PREFIX_EVEX_0F3841_W_0) }, + }, /* EVEX_W_0F384A_X86_64 */ { { EVEX_LEN_TABLE (EVEX_LEN_0F384A_X86_64_W_0) }, @@ -445,6 +449,10 @@ { "vextracti32x8", { EXymm, XM, Ib }, PREFIX_DATA }, { "vextracti64x4", { EXymm, XM, Ib }, PREFIX_DATA }, }, + /* EVEX_W_0F3A3D */ + { + { "vunpackb", { XM, EXEvexXNoBcst, Ib }, NO_PREFIX }, + }, /* EVEX_W_0F3A42 */ { { PREFIX_TABLE (PREFIX_EVEX_0F3A42_W_0) }, @@ -486,6 +494,35 @@ { "push2", { { PUSH2_POP2_Fixup, q_mode}, Eq }, 0 }, { "push2p", { { PUSH2_POP2_Fixup, q_mode}, Eq }, 0 }, }, + /* EVEX_W_MAP5_37_P_0 */ + { + { "vcvtbf42hf8", { XM, EXxmmq }, 0 }, + }, + /* EVEX_W_MAP5_38 */ + { + { PREFIX_TABLE (PREFIX_EVEX_MAP5_38_W_0) }, + }, + /* EVEX_W_MAP5_39 */ + { + { PREFIX_TABLE (PREFIX_EVEX_MAP5_39_W_0) }, + }, + /* EVEX_W_MAP5_3A */ + { + { PREFIX_TABLE (PREFIX_EVEX_MAP5_3A_W_0) }, + }, + /* EVEX_W_MAP5_3B */ + { + { PREFIX_TABLE (PREFIX_EVEX_MAP5_3B_W_0) }, + }, + /* EVEX_W_MAP5_3C */ + { + { PREFIX_TABLE (PREFIX_EVEX_MAP5_3C_W_0) }, + }, + /* EVEX_W_MAP5_3E */ + { + { Bad_Opcode }, + { PREFIX_TABLE (PREFIX_EVEX_MAP5_3E_W_1) }, + }, /* EVEX_W_MAP5_5B_P_0 */ { { "vcvtdq2ph%XY", { XMxmmq, EXx, EXxEVexR }, 0 }, diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h index b2f02e494f9..fe515a01932 100644 --- a/opcodes/i386-dis-evex.h +++ b/opcodes/i386-dis-evex.h @@ -366,7 +366,7 @@ static const struct dis386 evex_table[][256] = { { "%XEvpmaxu%DQ", { XM, Vex, EXx }, PREFIX_DATA }, /* 40 */ { "%XEvpmull%DQ", { XM, Vex, EXx }, PREFIX_DATA }, - { Bad_Opcode }, + { VEX_W_TABLE (EVEX_W_0F3841) }, { "vgetexpp%XW", { XM, EXx, EXxEVexS }, PREFIX_DATA }, { "vgetexps%XW", { XMScalar, VexScalar, EXdq, EXxEVexS }, PREFIX_DATA }, { "vplzcnt%DQ", { XM, EXx }, PREFIX_DATA }, @@ -652,7 +652,7 @@ static const struct dis386 evex_table[][256] = { { EVEX_LEN_TABLE (EVEX_LEN_0F3A3A) }, { EVEX_LEN_TABLE (EVEX_LEN_0F3A3B) }, { Bad_Opcode }, - { Bad_Opcode }, + { VEX_W_TABLE (EVEX_W_0F3A3D) }, { "vpcmpu%BW", { MaskG, Vex, EXx, VPCMP }, PREFIX_DATA }, { "vpcmp%BW", { MaskG, Vex, EXx, VPCMP }, PREFIX_DATA }, /* 40 */ @@ -1226,16 +1226,16 @@ static const struct dis386 evex_table[][256] = { { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, + { PREFIX_TABLE (PREFIX_EVEX_MAP5_36) }, + { PREFIX_TABLE (PREFIX_EVEX_MAP5_37) }, /* 38 */ - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, - { Bad_Opcode }, + { VEX_W_TABLE (EVEX_W_MAP5_38) }, + { VEX_W_TABLE (EVEX_W_MAP5_39) }, + { VEX_W_TABLE (EVEX_W_MAP5_3A) }, + { VEX_W_TABLE (EVEX_W_MAP5_3B) }, + { VEX_W_TABLE (EVEX_W_MAP5_3C) }, + { PREFIX_TABLE (PREFIX_EVEX_MAP5_3D) }, + { VEX_W_TABLE (EVEX_W_MAP5_3E) }, { Bad_Opcode }, /* 40 */ { Bad_Opcode }, diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 23818dd6939..fe61c6fe2f5 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -1211,6 +1211,7 @@ enum PREFIX_EVEX_0F3838, PREFIX_EVEX_0F3839, PREFIX_EVEX_0F383A, + PREFIX_EVEX_0F3841_W_0, PREFIX_EVEX_0F384A_X86_64_W_0_L_2, PREFIX_EVEX_0F3852, PREFIX_EVEX_0F3853, @@ -1272,6 +1273,15 @@ enum PREFIX_EVEX_MAP5_6D, PREFIX_EVEX_MAP5_6E_L_0, PREFIX_EVEX_MAP5_6F_X86_64, + PREFIX_EVEX_MAP5_36, + PREFIX_EVEX_MAP5_37, + PREFIX_EVEX_MAP5_38_W_0, + PREFIX_EVEX_MAP5_39_W_0, + PREFIX_EVEX_MAP5_3A_W_0, + PREFIX_EVEX_MAP5_3B_W_0, + PREFIX_EVEX_MAP5_3C_W_0, + PREFIX_EVEX_MAP5_3D, + PREFIX_EVEX_MAP5_3E_W_1, PREFIX_EVEX_MAP5_74, PREFIX_EVEX_MAP5_78, PREFIX_EVEX_MAP5_79, @@ -1827,6 +1837,7 @@ enum EVEX_W_0F3835_P_2, EVEX_W_0F3837, EVEX_W_0F383A_P_1, + EVEX_W_0F3841, EVEX_W_0F384A_X86_64, EVEX_W_0F3859, EVEX_W_0F385A_L_n, @@ -1849,6 +1860,7 @@ enum EVEX_W_0F3A39_L_n, EVEX_W_0F3A3A_L_2, EVEX_W_0F3A3B_L_2, + EVEX_W_0F3A3D, EVEX_W_0F3A42, EVEX_W_0F3A43_L_n, EVEX_W_0F3A70, @@ -1860,6 +1872,13 @@ enum EVEX_W_MAP4_F8_P3_M_1, EVEX_W_MAP4_FF_R_6, + EVEX_W_MAP5_37_P_0, + EVEX_W_MAP5_38, + EVEX_W_MAP5_39, + EVEX_W_MAP5_3A, + EVEX_W_MAP5_3B, + EVEX_W_MAP5_3C, + EVEX_W_MAP5_3E, EVEX_W_MAP5_5B_P_0, EVEX_W_MAP5_6C_P_0, EVEX_W_MAP5_6C_P_2, @@ -1935,6 +1954,7 @@ struct dis386 { "XH" => print 'h' if EVEX.W=0, EVEX.W=1 is not a valid encoding (for FP16) "XB" => print 'bf16' if EVEX.W=0, EVEX.W=1 is not a valid encoding (for BF16) + "HB" => print 'hf' if EVEX.W=0 or 'bf' if EVEX.W=1 "XS" => print 's' if !EVEX or EVEX.W=0, EVEX.W=1 is not a valid encoding "XV" => print "{vex} " pseudo prefix "XE" => print "{evex} " pseudo prefix if no EVEX-specific functionality is @@ -10920,6 +10940,11 @@ putop (instr_info *ins, const char *in_template, int sizeflag) goto case_B; } + else if (l == 1 && last[0] == 'H') + { + *ins->obufp++ = ins->vex.w ? 'b' : 'h'; + *ins->obufp++ = 'f'; + } else if (l && last[0] == 'X') { if (!ins->vex.w) diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index 3fadc33a763..b8d7ad2b0b1 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -251,6 +251,8 @@ static const dependency isa_dependencies[] = "AVX10_1" }, { "AVX10_2", "AVX10_1_AUX" }, + { "AVX10_V2_AUX", + "AVX10_1" }, { "SEV_ES", "SVME" }, { "SNP", @@ -454,6 +456,7 @@ static bitfield cpu_flags[] = BITFIELD (APX_F), BITFIELD (AVX10_1_AUX), BITFIELD (AVX10_2), + BITFIELD (AVX10_V2_AUX), BITFIELD (MOVRS), BITFIELD (MWAITX), BITFIELD (CLZERO), diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index 0dbb4ce1e35..4da0ceffa96 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -211,6 +211,8 @@ enum i386_cpu CpuAVX512_BMM, /* AVX10.1-aux Instructions support required. */ CpuAVX10_1_AUX, + /* AVX10 V2 Auxiliary Instructions support required. */ + CpuAVX10_V2_AUX, /* TDX Instructions support required. */ CpuTDX, /* Intel AVX VNNI Instructions support required. */ @@ -512,6 +514,7 @@ typedef union i386_cpu_flags unsigned int cpuavx512_vp2intersect:1; unsigned int cpuavx512_bmm:1; unsigned int cpuavx10_1_aux:1; + unsigned int cpuavx10_v2_aux:1; unsigned int cputdx:1; unsigned int cpuavx_vnni:1; unsigned int cpuavx512_fp16:1; diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index 557a9b2defb..413ad4f2879 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -3614,6 +3614,52 @@ vucomxs<sdh>, 0x<sdh:spfx>2e, AVX10_2, Modrm|EVexLIG|<sdh:spc1>|<sdh:vexw>|Disp8 // AVX10.2 instructions end. +// AVX10_V2_AUX instructions. + +<cvtps8:opc, bf8:39, bf8s:3b, hf8:38, hf8s:3a> + +vcvtps2<cvtps8><xyz>, 0xf3<cvtps8:opc>, AVX10_V2_AUX, Modrm|Map5|<xyz:attr>|<xyz:att>|VexW0|Masking|Broadcast|NoSuf, { <xyz:src>|Dword, RegXMM } + +vcvtbiasps2<cvtps8>, 0x<cvtps8:opc>, AVX10_V2_AUX, Modrm|Map5|Src1VVVV|VexW0|Masking|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|Dword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM } + +<cvtps8> + +<cvtrops8:opc, hf8:38, hf8s:3a> + +vcvtrops2<cvtrops8><xyz>, 0x66<cvtrops8:opc>, AVX10_V2_AUX, Modrm|Map5|<xyz:attr>|<xyz:att>|VexW0|Masking|Broadcast|NoSuf, { <xyz:src>|Dword, RegXMM } + +<cvtrops8> + +<hb:vexw, hf:VexW0, bf:VexW1> + +vcvt<hb>82ps, 0x36, AVX10_V2_AUX, Modrm|Map5|EVex128|<hb:vexw>|Masking|Disp8MemShift=2|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM } +vcvt<hb>82ps, 0x36, AVX10_V2_AUX, Modrm|Map5|EVex256|<hb:vexw>|Masking|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegYMM } +vcvt<hb>82ps, 0x36, AVX10_V2_AUX, Modrm|Map5|EVex512|<hb:vexw>|Masking|Disp8MemShift=4|NoSuf, { RegXMM|Unspecified|BaseIndex, RegZMM } + +vcvt<hb>82bf4s, 0xf33d, AVX10_V2_AUX, RegMem|Map5|EVex128|<hb:vexw>|Disp8MemShift=3|NoSuf, { RegXMM, RegXMM|Qword|Unspecified|BaseIndex } +vcvt<hb>82bf4s, 0xf33d, AVX10_V2_AUX, RegMem|Map5|EVex256|<hb:vexw>|Disp8MemShift=4|NoSuf, { RegYMM, RegXMM|Unspecified|BaseIndex } +vcvt<hb>82bf4s, 0xf33d, AVX10_V2_AUX, RegMem|Map5|EVex512|<hb:vexw>|Disp8MemShift=5|NoSuf, { RegZMM, RegYMM|Unspecified|BaseIndex } + +vcvt<hb>62hf8, 0x6637, AVX10_V2_AUX, Modrm|Map5|<hb:vexw>|Masking|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM } + +<hb> + +vcvtbf82bf6s, 0xf33e, AVX10_V2_AUX, Modrm|EVexDYN|Map5|VexW1|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM } + +vcvthf82hf6s, 0xf33c, AVX10_V2_AUX, Modrm|EVexDYN|Map5|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM } + +vcvtbf42hf8, 0x37, AVX10_V2_AUX, Modrm|Map5|EVex128|VexW0|Masking|Disp8MemShift=3|NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM } +vcvtbf42hf8, 0x37, AVX10_V2_AUX, Modrm|Map5|EVex256|VexW0|Masking|Disp8MemShift=4|NoSuf, { RegXMM|Unspecified|BaseIndex, RegYMM } +vcvtbf42hf8, 0x37, AVX10_V2_AUX, Modrm|Map5|EVex512|VexW0|Masking|Disp8MemShift=5|NoSuf, { RegYMM|Unspecified|BaseIndex, RegZMM } + +vpmovssdb, 0xf341, AVX10_V2_AUX, Modrm|EVex128|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegXMM, RegXMM|Dword|Unspecified|BaseIndex } +vpmovssdb, 0xf341, AVX10_V2_AUX, Modrm|EVex256|Masking|Space0F38|VexW0|Disp8MemShift=3|NoSuf, { RegYMM, RegXMM|Qword|Unspecified|BaseIndex } +vpmovssdb, 0xf341, AVX10_V2_AUX, Modrm|EVex512|Masking|Space0F38|VexW0|Disp8MemShift=4|NoSuf, { RegZMM, RegXMM|Unspecified|BaseIndex } + +vunpackb, 0x3d, AVX10_V2_AUX, Modrm|Masking|Space0F3A|VexW0|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8, RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM } + +// AVX10_V2_AUX instructions end. + // MOVRS instructions. prefetchrst2, 0xf18/4, MOVRS, Modrm|Anysize|IgnoreSize|NoSuf, { BaseIndex } -- 2.34.1