Re: [qucs:discussion] ERROR: TR1: Jacobian singular at t = 0.000e+000, aborting transient analysis
al davis via Gnucap-devel <[email protected]> Mon, 2 Jan 2023 10:56:42 -0500
| Newsgroups | gmane.comp.gnu.gnucap.devel |
|---|---|
| Message-ID | <20230102105642.26db79cd@z> |
On Fri, 30 Dec 2022 21:23:59 +0100 Felix Salfelder via Gnucap-devel <[email protected]> wrote: > [1] https://sourceforge.net/p/qucs/discussion/311050 > I am still in the moving mode. I will try to make a more detailed reply to Francisco's questions in a few days. First .. The person promoting LTspice is a troll. He obviously knows nothing about what he is saying, and made no attempt to understand the original poster. In this case, the "Jacobian singular" messages (From, Qucs) say that the circuit doesn't work. It goes up in smoke. Gnucap does not give that error message. Instead, it says something like "open circuit", which hopefully is more meaningful. Apparently (and confirmed in a private conversation with Mike E. a bunch of years ago) LTspice will modify the circuit to get a good looking result, even though it is likely to be incorrect. Gnucap takes the opposite stance ... It is better to "fail" than to give a believable incorrect result. Convergence failure means there is something wrong with your circuit or your models. In this case, we have an "idealized" schematic, with "idealzed" models. Think about a circuit that has two current sources in series. Let's say one is 1 milliamp, the other is two milliamps. What is the voltage at the junction? The answer is .... You can't do that. Circuit goes up in smoke. OK .. now make both 1 millamp. Does it work now? Maybe, but I still have no way to determine the voltage. So this is what is wrong with the original exercise here. With idealized models of transistors, you have this situation. The models need to incorporate the non-ideal parts, otherwise the circuit doesn't work. As is typical of IC designs, there are lots of transistors. Resistors and capacitors are kept to a minimum. Some of those transistors are acting as resistors and capacitors. With incomplete model parameters, that part is missing, and you will not get a correct simulation. There are no parameters on the transistors. You might be tempted to assume they are all the same. They are not. They are all based on the same "process" but they could be different sizes. This is why Spice (and Spice format simulators such as Gnucap) use the model card, and also some parameters for each instance, usually something like length, width, and area. You can specify things like this one is 10 times the size as that one.