gnucap-modelgen-verilog, branches and contributions

Dear all,

Our Verilog-AMS model compiler [0] is now able to emit code for
contribution statements. In combination with previous work on
derivatives, we are able to compile, instanciate and simulate simple
analog devices.

This work was funded through the NGI0 Entrust Fund [1]. It concludes
task 1a in [2].

Best wishes
felix

[0] https://git.savannah.gnu.org/cgit/gnucap/gnucap-modelgen-verilog.git/log/?h=develop
[1] https://nlnet.nl/project/Gnucap-VerilogAMS/
[2] http://gnucap.org/dokuwiki/doku.php/gnucap:projects:nlnet:verilogams