October'24 snapshots

Dear all,

we have prepared snapshots for Gnucap and Modelgen-Verilog [0,1].

These snapshots update and improve simulator internals for events in
mixed mode simulation. Modelgen now supports monitored events, such as
timer, cross, as well as the transition filter. This includes code
generation for simulation with Gnucap. Related features, such as the
z-transform filter have improved significantly.

We would like to invite all to participate, give feedback, contribute,
just make a feature request, help us prioritise as well as collaborate
or join us. Your own project may well be on our roadmap.

In particular, we are seeking help on the integration with other tools,
by means of a standardised interchange format [2], with funding
available from the project budget. We need the ability to share a
circuit model across tools, extending whats common practice in compact
modelling to schematic interchange, and later layout.

This project was funded through the NGI0 Entrust Fund, a fund
established by NLnet with financial support from the European
Commission's Next Generation Internet programme, under the aegis of DG
Communications Networks, Content and Technology under grant agreement No
101069594.

Best wishes
Felix

[0] https://git.savannah.gnu.org/cgit/gnucap.git/tag/?h=20241002-dev
[1] https://git.savannah.gnu.org/cgit/gnucap/gnucap-modelgen-verilog.git/tag/?h=20241002-dev
[2] http://gnucap.org/dokuwiki/doku.php/gnucap:user:netlist_import_and_export