Adding models to the gnucap system

Dear Mr Davis ( and who ever else )
    Sorry to be so slow about getting in touch with you again after my 
last email .

You did not answer my questions regarding the gnucap parser systems .
    As I am sure you can tell from your copy of my header file (anybody 
else interested in a perusal copy of a black box bipolar transistor 
model , should say , and I will try to supply one , via an 
upload.gnu.org posting , which I have not done yet). My model has not 
been integrated into any spice type circuit simulator yet .

The model requires a card file entry/spice script , something like the 
following :-

Q1 4 5 7 Qbc547c CONF=1 NO=1

(conf = transistors circuit configuration i.e loaded emitter  base 
input  and  NO  = 1 is noise on  , either missing , and the noise 
functionality is off )

.model Qbc547c NPN FB1=33.6 FB2=105 FB3=273 FB4=420 FB5=420 FB6=126 
FBHT=590 FBLT=420 RB1=1 RB2=3.373E-3 RB3=0.45 RB4=95 RB5=100 RB6=101 
RBHT=120 RBLT=85 FIC1=0.001E-3 FIC2=0.008E-3 FIC3=0.2E-3 FIC4=10E-3 
FIC5=50E-3 FIC6=200E-3 RIC1=0.00E-3 RIC2=0.07E-3 RIC3=2.43E-3 
RIC4=13.7E-3 RIC5=15.3E-3 RIC6=200E-3
RBR1=17 RBR2=5.2E3 RBR3=250 RIB1=23E-3 RIB2=200E-3 FBR1=333E3 
FBR2=1733333 FBR3=800 FIB1=6.5E-5 FIB2=0.82E-3 RBIHT=5E3 RBILT=5.3E3 
FBIHT=542 FBILT=667 DF1=200 DF2=200 DF3=10 DF4=10 PR1=1 PR2=1 PR3=1 
TJC=200 TCS=83 TAS=40 TA=27 C1VS1=6E-12 C1VC2=5E-12 C1VE3=3.5E-12 
V1CS1=0.4 V1CC2=1.5 V1CE3=4 C2VS1=3.5E-12 C2VC2=2.2E-12 C2VC3=1.2E-12 
C2VE4=1.2E-12 V2CS1=0.4 V2CC2=4 V2CC3=25 V2CE4=40 NF1=4.06 NF2=7.39 
NF3=22026 NF4=22026 RG1=2000 RG2=2000 RG3=11  RG4=25 FIBVL =-6 
FIBVH=-1.14 FIBRL=60E3 FIBRH=11E6 RDR=1.14E3 RIBVL=22E-3 RIBVH=392E-3 
RIBRH=509 RIBRL=1.134 RIL=6E11 RIH=1.5E8 TIL=0 TIH=150 LEVEL=4


EXPLANATION :

.model Qbc547c NPN
As per other BJT models

FB1=33.6 FB2=105 FB3=273 FB4=420 FB5=420 FB6=126 FBHT=590 FBLT=420 RB1=1 
RB2=3.373E-3 RB3=0.45 RB4=95 RB5=100 RB6=101 RBHT=120 RBLT=85

FB = Forwards Beta , there are six points used by this model ,plus
FBLT = Forwards Beta Low Temperature ( 20C)
FBHT = Forwards Beta High Temperature ( 25C)

R Values as F Values except they are reverse ones (ie collector emitter 
swapped , and base N not P )

FIC1=0.001E-3 FIC2=0.008E-3 FIC3=0.2E-3 FIC4=10E-3 FIC5=50E-3 
FIC6=200E-3 RIC1=0.00E-3 RIC2=0.07E-3 RIC3=2.43E-3 RIC4=13.7E-3 
RIC5=15.3E-3 RIC6=200E-3

These are the collector_emitter currents for the Beta values

RBR1=17 RBR2=5.2E3 RBR3=250 RIB1=23E-3 RIB2=200E-3 FBR1=333E3 
FBR2=1733333 FBR3=800

These are the Reverse Base Resistance and there Foward counterparts . 
The model generates two log log impedance curves one below linear and 
one standard linear input model .

FIB1=6.5E-5 FIB2=0.82E-3 RBIHT=5E3 RBILT=5.3E3 FBIHT=542 FBILT=667

FIB1 = Start of linear input resistance current
FIB2 = End of linear input resistance current
FBIHT= Forward base impedance high temperature (20C)
FBILT= Forward base impedance low temperature (25C)

DF1=200 DF2=200 DF3=10 DF4=10

DF = Delta Frequency for the noise generation model . each configuration 
of the bipolar transistor has a different gain and noise signature , 
dependent upon whether it is base loaded emitter , base loaded collector 
, grounded base emitter , or grounded base collector ,
possibly not in that order .

PR1=1 PR2=1 PR3=1

PR = Pin Resistance this is used by the noise signal generation code to 
estimate Rinput

TJC=200 TCS=83 TAS=40 TA=27

TJC=  Theta Junction case
TCS= Theta Case Sink
TAS= Theta  Ambient Sink
TA= Temperature ambient to the device


C1VS1=6E-12 C1VC2=5E-12 C1VE3=3.5E-12
&
C2VS1=3.5E-12 C2VC2=2.2E-12 C2VC3=1.2E-12 C2VE4=1.2E-12

C1 = Capacitor collector base
C2 = Capacitor base emitter

Values taken from the manufacturers graphs

VS1 = Voltage Start  of gradient set 1
VC2 = Voltage Corner  of gradient set 1 and Start of gradient set two
VE3 = Voltage End gradient set two

Ditto for C2 , but there is another corner , hence three gradient sets 
and four voltages to follow

V1CS1=0.4 V1CC2=1.5 V1CE3=4
&
V2CS1=0.4 V2CC2=4 V2CC3=25 V2CE4=40

Ditto for capacitor designations , corners , start and end point 
attributions these are the voltages at which the gradients change 
significantly

NF1=4.06 NF2=7.39 NF3=22026 NF4=22026

NF = Noise Figure . This is anti-logged as 10 logs are faster than 
natural (I believe ) and ; if they are supplied as 10 logs or natural is 
not clear , anti logged , they are all the same .

RG1=2000 RG2=2000 RG3=11  RG4=25

RG = Resistance G optimal . The optimal  low noise input resistance for 
this transistor , 1-4 are the configurations for each input impedance , 
one is correct , two three and four are bad guess figures .

FIBVL=-6 FIBVH=-1.14 FIBRL=60E3 FIBRH=11E6 FIBRH=1.14E3 RDR=1.14E3 
RIBVL=22E-3 RIBVH=392E-3 RIBRH=509 RIBRL=1.134

FIBVL= Forwards inverse base voltage low
FIBVH= Forwards inverse base voltage high
FIBRL= Forwards inverse base resistance low
FIBRH= Forwards inverse base resistance high

This being a forward characteristic the diode works and there is no 
conduction through the transistor , collector_emitter .

RDR= Reverse diode resistance , correction for the reverse off 
characteristics failure to switch off completely , as second diode fails 
to produce an infinite impedance ; as the other junction does in the 
opposite polarisation .
    Otherwise the R versions , off characteristic descriptors are the same .


RIL=6E11 RIH=1.5E8 TIL=0 TIH=150

These are not Reverse anything they are :-

RIL=Resistance of leakage at low temperature of capacitor Cbo (1 , base 
collector)
RIH=Resistance of leakage at high temperature
TIL= Temperature of leakage impedance RIL
TIH= Temperature of leakage impedance RIH

Leakage upon the capacitors is only generated for the base collector 
capacitor as the manufacturers data sheets only supply that 
characteristic ; and ignoring the other leakage current is a safe 
behavior which merely makes the model more likely to thermally misbehave 
than otherwise .
 
LEVEL=4

chosen as I believe bipolar levels at present end at level 3 (anything 
higher if this belief is false)

This characteristic I respectfully submit for your perusal , in the 
hopes that you might condescend to explain to me how I might input this 
into my transistor functions structure , from a spice card fed to your 
parsing system .

I should also like to know  how to pass the input node voltages to my 
code , and their output currents .
If you would also explain how , I might also like to pass some 
diagnostic 'H' function data to the operator at a system call perhaps 
SENS ? Any values you might like from my model I would be very willing 
to supply , if you would supply the correct hand shaking for your code 
with mine .
 If there are any other questions about the models you would like me to 
answer , please feel free to ask , and I will attempt to enlighten you .

Yours sincerely
B.S.J.W. Stephenson