Re: gnucap with verilog-ams netlist input

On Sunday 25 January 2009, John Griessen wrote:
> .
> /* Package instantiations */
> cap #(.value(1250e-9) ) C1 ( .p(B), .n(GND));
>
> In the verilog-ams the pos and neg terminals can be out of
> order.

That's what names are for.  If you name the terminals, you can 
put them in any order.

> What are the pos and neg terminal names in the built in
> model?

For a capacitor (and most basic 2-terminal devices) "p" and "n", 
as per the Verilog-AMS spec.

> Can we define them?

There is a method "port_name" that returns the names of the 
ports.  It takes an int argument, as if it is indexing an 
array.

You could edit the code.  You can make a modified version and 
use it as a plugin.

>
> With   .capacitor label n+ n– expression?   How?
That has nothing to do with Verilog.