Re: Possible solution for special characters in makefile paths

Hi Paul,

Some of my thoughts off the top of my head (sorry, no time to think
more thoroughly on this at the moment):

Paul D. Smith <[email protected]> writes:
 
> Here's an idea. It is not ideal and some may find it distasteful.

I think it is pretty alright.

 
> Maybe $[...] or $`...`.

We already have the:

make "foo bar"
make 'foo bar'

syntax. Can't we make one of them work in makefiles as well for
consistency?

"my target": "this: prerequisite"

('' will also work, see below).

> The disadvantage of this is that it would not be usable inside the
> makefile to encode expansions of values.  For example suppose someone
> runs 'make FOO="bar biz"' and the makefile author knows that the value
> of FOO should always be treated as a single word; they may want to
> write:
> 
>   FOO=$[$(FOO)]

I think this should not be possible. If a value of a variable should
be treated as a single word, then it should be specified as such and
not re-interpreted half way through. In other words, the only time
it should be possible to decide and specify that, say, space is
part of a value and not a delimiter is when we specify that value.
Inside make (so to speak) it is always treated as specified and
once it gets outside (e.g., into a shell script) it is escaped
accordingly.

So in this light (using "" as the syntax):

make FOO="bar biz"   # two words
make BAR='"bar biz"' # single word

In the makefile:

foo := $(FOO)  # two words
bar := $(BAR)  # one word

foo := bar biz
foo := "bar biz"

 
> I should note that in no way am I suggesting that we would fix the
> user's recipes automatically to work properly with these values.  That
> would be their responsibility.  As an example, the default builtin rules
> such as:
> 
>    %.o : %.c
>            $(COMPILE.o) -c $< -o $@

I actually think that it might not be a bad idea to try to escape
values that were escaped. In other words, "escaped input, escaped
output". So that:

make foo.o         # Runs CC -c foo.c -o foo.o
make '"foo bar.o"' # Runs CC -c "foo bar.c" -o "foo bar.o"

Again, there is probably a lot of holes in my ideas, but generally,
this kind of semantics where make doesn't re-interpret values
and simply passes them through feels cleaner and easier to explain.

Boris