suppress "target '*' given more than once in the same rule"

"Belliveau, Fran - 0666 - MITLL" <[email protected]> Tue, 25 Jun 2024 16:03:03 +0000
Newsgroups gmane.comp.gnu.make.general
Message-ID <BN2P110MB15437E9AF4A3A987C87D3AC597D5A@BN2P110MB1543.NAMP110.PROD.OUTLOOK.COM>
I have a setup where I use include directives to access makefile content used by multiple “make” situations throughout a large project.

As I try to replace a bunch of (heavily simplified) things like:

FOO_DIR?=fd
BAH_DIR?=bd
####
$(FOO_DIR)/foo: $(F_HDRS)
mkdir -p $(FOO_DIR)
genF $@

$(BAH_DIR)/foo: $(B_HDRS) 
mkdir -p $(BAH_DIR) 
genB $@ 

with a something like

####
$(FOO_DIR) $(BAH_DIR):
mkdir -p $@ 

$(FOO_DIR)/foo: $(HDRS) | $(FOO_DIR) 
gen $@ 

$(BAH_DIR)/bah: $(B_HDRS) | $(BAH_DIR) 
genB $@ 

I run into “make complaints” when multiple directory variables actually point to the same directory.
This may just be a warning, but it looks like an error to those who do not know what is going on.

I am wondering if there is a way to suppress this with a directive of some sort?
Is there a function call I might be able to make like $(unique $(FOO_DIR) $(BAH_DIR)): ?


Francis Belliveau
Consultant
Lincoln Laboratory, Massachusetts Institute of Technology
244 Wood Street
Lexington, MA 02421-6426
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