Make: multiple files to GCC

Hi,

In using Make, I would like to pass more than one C file, that needs to 
be compiled, to gcc.  The current default is to invoke gcc with one file 
to be compiled, then invoke gcc again.

Given:

my_executable.exe : file_a.o file_b.o file_c.o file_d.o

file_a.o : file_a.c file_a.h

file_b.o : file_b.c file_b.h

file_c.o : file_c.c file_c.h

file_d.o : file_d.c file_d.h

In the above scenario, if all the '.o' file are deleted, the gcc 
compiler will be invoked four times, once for each file.

I would like to invoke gcc once with four files on the command line:
   gcc -c file_a.c file_b.c file_c.c file_d.c

This will speed up my build process by reducing the number of times gcc 
is executed.  I often have to rebuild the project or all the modules in 
a project (due to header file changes).

-- 
Thomas Matthews

C++ newsgroup welcome message:
          http://www.slack.net/~shiva/welcome.txt
C++ Faq: http://www.parashift.com/c++-faq-lite
C Faq:   http://www.eskimo.com/~scs/c-faq/top.html
alt.comp.lang.learn.c-c++ faq:
          http://www.comeaucomputing.com/learn/faq/
Other sites:
     http://www.josuttis.com  -- C++ STL Library book
     http://www.sgi.com/tech/stl -- Standard Template Library