make: need help reducing boilerplate repetition

I have written a simple makefile that builds all of the C++ source
files in a folder and turns them into a static library. Ultimately I
need to build multiple libraries, so I need to accomplish this:

Src/Lib/libfoo/*.cpp --> Lib/libfoo.a
Src/Lib/libbar/*.cpp --> Lib/libbar.a
Src/Lib/libbaz/*.cpp --> Lib/libbaz.a
etc.

I have accomplished this by writing the following code for each
library, shown here just for libfoo.a:

# source are just all .cpp files in the libfoo directory
libfoo_SOURCES = $(wildcard Src/Lib/libfoo/*.cpp)

# replace .cpp with .o to create list of objects
libfoo_OBJECTS = $(patsubst %.cpp, %.o, $(libfoo_SOURCES))

# this is how we link the objects in Src/Lib/libfoo to mkae Lib/
libfoo.a
libfoo: $(libfoo_OBJECTS)
        $(AR) $(ARFLAGS) Lib/libfoo.a $(libfoo_OBJECTS)

# here is how we compile objects; needed so .o files end up in Src/Lib/
libfoo
Src/Lib/libfoo/%.o : Src/Lib/libfoo/%.cpp
        $(COMPILE) -c $< -o $@

It's all simple enough, except that I have about 15 libraries to
build. That translates to a lot of boilerplate repetition Can anyone
suggest how to structure my makefile such that I could build multiple
libraries without writing the above lines for each and every one?