override make file variables

parag <[email protected]> Tue, 15 Apr 2008 23:49:43 -0700 (PDT)

Newsgroups	gmane.comp.gnu.utils
Organization	http://groups.google.com
Message-ID	<eba1c737-6d5e-4eb4-a819-415d04fb3fe6@m36g2000hse.googlegroups.com>

hi all,
 i have a makefile
cat makefil
CPP=cc


.
.
.
.

Now I want to override this CPP from the invocation line for the
makefile. Is it possible to do the same . please help me

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