RE: BootLDR, FLASH and progress?

Am Di, den 01.06.2004 schrieb Schweizer Walter um 9:37:
> Yes.
> Yes, I am working on it. The problem is at the moment, that the code
> only supports two FLASH chips in parallel 32 bit.
> I have made some changes in the mapping to support two chips in 16 bit mode.
> But there is still a bug in the routines. I have a hard time figuring out
> how the routines are ment to work. Don't hold your breath.

I have no idea how the SIMpad handles the chips but I have just
successfully ported bootldr to the Hoeft&Wessel Integral 90200 so I know
a little about it.
The flashing process is IIRC quite simple. The main program calls the
flash_region code for the appropriate chip type (intel/amd) and the
flash code writes word-wise, i.e. 16bit words on 16bit flash and 32bit
words on 32bit flash.
The word write function takes care of splitting the 32bit word into two
16bit values if needed - I had to do this for our AMD flash.
So in general, if switching between the chips could be done by address
lines, it shouldn't be that hard to modify the flash code appropriately.

> Walter
CU
  nils faerber

-- 
kernel concepts          Tel: +49-271-771091-12
Dreisbachstr. 24         Fax: +49-271-771091-19
D-57250 Netphen          Mob: +49-176-21024535
--



-------------------------------------------------------
This SF.Net email is sponsored by: Oracle 10g
Get certified on the hottest thing ever to hit the market... Oracle 10g. 
Take an Oracle 10g class now, and we'll give you the exam FREE.
http://ads.osdn.com/?ad_id=3149&alloc_id=8166&op=click