Optimization around mul and restoring r1

Hello!

How difficult would it be to convince avr-gcc to not re-zero r1 instantly
after mul, but delay it until a zero is actually needed? For example,
see this actual avr-gcc output:

        Vneutral = (uint16_t)Vbus * t >> 8;
->
        lds     r25, 0x20FD
        mul     r24, r25
        movw    r24, r0
        eor     r1, r1
        sts     0x205C, r25

Could be just:

        lds     r25, 0x20FD
        mul     r24, r25
        sts     0x205C, r1
        eor     r1, r1

Saving one whole cycle! ;)

I understand that some things can really benefit from having a zero
register around (cpse, cpc, adc, sbc low reg, etc.), but could it not be
restored before returning, or when one of the zero-desiring instructions
is needed? Perhaps the clobbering of flags is difficult...

In an assembly project I am maintaining, I use Z as an atomic interrupt
vector (vector table contains "ijmp") by packing the entry points such
that the high byte is always zero, then use ZH (r31) as a 0 constant.
Not even close to avr-gcc ABI-compatible, but it's fast, and it can be
reloaded without side effects.

Simon-