Re: GCC bug?
"Bruce D. Lightner" <[email protected]> Thu, 16 Dec 2021 16:50:55 -0800
| Newsgroups | gmane.comp.hardware.avr.gcc |
|---|---|
| Message-ID | <[email protected]> |
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Ian,
Just from a purely AVR architecture point of view, the AVR_HAVE_RAMPD
#define indicates that the AVR chip in question supports the "RAMP"
paging register, described as follows:
*RAMPD*
Register concatenated with the Z-register enabling direct addressing
of the whole data space on MCUs
with more than 64KB data space.
Eventually the originally tiny AVR chips' addressable memory got so big
that we needed a "paging" register. (That's a repeating theme with
every 8-bit/16-bit microcontroller family.)
So the "RAMPD" register needs to be saved along with the X, Y and Z
"special function" registers, if it is present.
Best regards,
Bruce
------------------------------------------------------------------------
On 12/16/2021 3:46 PM, Ian Molton wrote:
> Browsing the GCC source, I found this in gcc/config/avr/avr.c
>
> if (AVR_HAVE_RAMPZ
> && TEST_HARD_REG_BIT (set, REG_Z)
> && TEST_HARD_REG_BIT (set, REG_Z + 1))
> {
> emit_push_sfr (rampz_rtx, false /* frame */, AVR_HAVE_RAMPD,
> treg);
> }
>
>
> I wont pretend to fully understand this part of the compiler, but that
> AVR_HAVE_RAMPD looks shady to me?
>
> Anyone with deeper knowledge want to have a look?
>
> -Ian
>
--
*Bruce D. Lightner*
*Lightner Engineering*
8551 La Jolla Shores Drive
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<div class="moz-cite-prefix">Ian,<br>
<br>
Just from a purely AVR architecture point of view, the
AVR_HAVE_RAMPD #define indicates that the AVR chip in question
supports the "RAMP" paging register, described as follows:<br>
<br>
<b>RAMPD</b><br>
Register concatenated with the Z-register enabling direct
addressing of the whole data space on MCUs<br>
with more than 64KB data space.<br>
<br>
Eventually the originally tiny AVR chips' addressable memory got
so big that we needed a "paging" register. (That's a repeating
theme with every 8-bit/16-bit microcontroller family.)<br>
<br>
So the "RAMPD" register needs to be saved along with the X, Y and
Z "special function" registers, if it is present.<br>
<br>
Best regards,<br>
<br>
Bruce<br>
<br>
<hr width="100%" size="2">On 12/16/2021 3:46 PM, Ian Molton wrote:<br>
</div>
<blockquote type="cite"
cite="mid:[email protected]">
<pre class="moz-quote-pre" wrap="">Browsing the GCC source, I found this in gcc/config/avr/avr.c
if (AVR_HAVE_RAMPZ
&& TEST_HARD_REG_BIT (set, REG_Z)
&& TEST_HARD_REG_BIT (set, REG_Z + 1))
{
emit_push_sfr (rampz_rtx, false /* frame */, AVR_HAVE_RAMPD,
treg);
}
I wont pretend to fully understand this part of the compiler, but that
AVR_HAVE_RAMPD looks shady to me?
Anyone with deeper knowledge want to have a look?
-Ian
</pre>
</blockquote>
<br>
<br>
<div class="moz-signature">-- <br>
<span style="font-size:9pt;font-family:sans-serif;"> <b>Bruce D.
Lightner</b><br>
<b>Lightner Engineering</b><br>
8551 La Jolla Shores Drive<br>
La Jolla, California 92037-3044<br>
Mobile/SMS: +1-858-228-7579<br>
Voice: +1-858-551-0770 ext. 2<br>
Email: <a class="moz-txt-link-abbreviated" href="mailto:[email protected]">[email protected]</a><br>
URL: <a class="moz-txt-link-freetext" href="http://www.lightner.net/lightner/bruce/">http://www.lightner.net/lightner/bruce/</a><br>
<br>
<i>CONFIDENTIALITY NOTICE: This e-mail and any attachments may
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